Fractional-rate decision feedback equalization use

专利名称：Fractional-rate decision feedback

equalization useful in a data transmissionsystem

发明人：Timothy M. Hollis申请号：US11772642申请日：20070702公开号：US07936812B2公开日：20110503

专利附图：

摘要：Decision feedback equalization (DFE) circuits are disclosed for use withfractional-rate clocks of lesser frequency than the data signal. For example, a one-half-

rate clocked DFE circuit utilizes two input data paths, which are respectively activated onrising and falling edges of an associated half-rate clock. Each of the input data paths has apair of comparators with differing reference voltage levels. The comparators in eachinput data path output to a multiplexer, which picks between the two comparatoroutputs depending on the logic level of the previously received bit. The output of eachinput data path is sent as a control input to the multiplexer of the other data path. Thus,the results from previously-detected bits affect which comparator's output is passed tothe output of the circuit, even though the synchronizing clock is half the frequency of thedata. A quarter-rate DFE circuit is also disclosed which operates similarly.

申请人：Timothy M. Hollis

地址：Meridian ID US

国籍：US

代理机构：Wong, Cabello, Lutsch, Rutherford & Brucculeri, LLP

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