专利名称:Reconfigurable integrated circuit with
integrated debugging facilities for use in anemulation system
发明人:Frederic Reblewski,Olivier Lepape申请号:US09404925申请日:19990924公开号:US0626B1公开日:20010724
专利附图:
摘要:An integrated circuit is described as comprising a plurality of logic elements(LEs), each of which having a plurality of outputs, and a partial scan register. The plurality
of LEs are operative to generate a plurality of output signals in response to a plurality ofinput signals correspondingly applied to the LEs. The partial scan register is
reconfigurably coupled to select ones of the LEs such that, when enabled, the partialscan register is operative to capture and output on a scan bus a record of signal statevalues circuit elements emulated by the selected LEs in a particular clock cycle of anoperating clock, wherein the partial scan register is enabled with application of a scanclock appropriately scaled to the operating clock.
申请人:REBLEWSKI FREDERIC,LEPAPE OLIVIER
代理机构:Columbia IP Law Group, PC
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