RT5037-P00_

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Preliminary

RT5037

Power Management IC with Single Cell Li-Battery SwitchingCharger Integrated Power Path Controller

General Description

The RT5037 is a highly integrated smart powermanagement IC which includes: switch-mode single cellLi-Ion/Li-Polymer battery charger, LDO, synchronize Buckregulator, Load Switch, and RTC-OSC for portableapplications. The RT5037 also features USB On-The-Go(OTG) support.

The RT5037 optimizes the charging task by using a controlalgorithm to vary the charge rate via different modes,including pre-charge mode, fast charge mode, and constantvoltage mode. The key charge parameters can beprogrammed via the I2C interface. The RT5037 resumesthe charge cycle whenever the battery voltage falls belowan internal threshold and automatically enters sleep modewhen the input power supply is removed.

Four integrated Synchronize Buck Regulators aredesigned to provide MAX 2/2/1.6/1.6A application with highefficiency.

Four integrated LDOs are designed to provide MAX 0.35/0.35/0.35/0.35A application.

Two Load Switches are integrated with load Ron. And aReal Time Clock (RTC) includes time counter and a32768Hz oscillator for portable applications.

The RT5037 also provides rich protection functions : OverCurrent Protection, Under Voltage Protection, Over VoltageProtection, Over Temperature Protection, and Over LoadProtection.

Features

Battery Charger

 High Accuracy Voltage/Current Regulation

 Average Input Current Regulation(AICR) : 0.1/0.5/0.7/0.9/1/1.5/2A

 Minimum Input Voltage Regulation(MIVR) : 4.2Vto 4.8V

 Charge Voltage Regulation: 3.65V to 4.4V Charge Current Regulation: 0.5A to 2A

 Synchronous 0.75/1.5MHz Fixed Frequency PWMController With Up To 95% Duty Cycle

 Reverse Leakage Protection To Prevent BatteryDrainage

 Thermal Regulation

 IRQ Output For Communication With IC Battery Temperature Detection Reverse Boost to Support OTG 1A4 LDOs

 MAX Output Current 0.35/0.35/0.35/0.35A2

 IC Programmable Output Level 4 LV Buck Regulators

 MAX Output Current 2/2/1.6/1.6A2

 IC Programmable Output Level No Schottky Barrier Diode Required 1.5M/3MHz Fixed Frequency Operation Auto Discharge FunctionRTC Timer and Oscillator2 Load Switches



Ordering Information

RT5037Package TypeQW : WQFN-40L 5x5 (W-Type)Lead Plating SystemG : Green (Halogen Free and Pb Free)

Note :

Richtek products are :

 RoHS compliant and compatible with the current require-

Applications



Cellular Telephones

Personal Information AppliancesTablet PC, Power BankPortable Instruments

ments of IPC/JEDEC J-STD-020.

 Suitable for use in SnPb or Pb-free soldering processes.

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RT5037

Pin Configurations

(TOP VIEW)

IRQSCLSDASTB_ENXTALINXTALOUTPWRONCLKOUTRESETBVOUTSB1Preliminary

Marking InformationRT5037GQW : Product Number

RT5037GQWYMDNNYMDNN : Date Code

40393837363534333231VINCHGVMIDCHGLXCHGVBOOTCHG

VDDAVBATSISENSNISENSPPPCTRL

123456710111213141516171819204130292827262524232221PGNDVINB1LXB1LXB2VINB2VINB4LXB4LXB3VINB3VOUTSB2VOUTSB4

Functional Pin DescriptionPin No. 1 2 3 4 5 6 7 8 Pin Name VINCHG VMIDCHG LXCHG VBOOTCHG VDDA VBATS ISENSN ISENSP Pin Function Charger Input Voltage For Adaptor/USB Power Source. Connection Point Between Reverse Blocking and High Side MOSFET. Internal Switch Node To Output Inductor Connection of Switching Charger Bootstrap Power Node For Switching Charger Internal Power For Analog Blocks, Put 1F To GND. Battery Voltage Regulation Node for Charger. Charging Current Sensing Negative Node. Charging Current Sensing Positive Node External Power Path Control. Used to control external power P-MOSFET 9 PPCTRL to achieve power path operation. 10 TS 11 12 14 13 15 16 17 18 VINL1 VOL1 VINL234 VOL2 VOL3 VOL4 VOUTLSW2 VINLSW Battery Temperature Detection. Input Power for LDO1. Output Voltage Regulation Node for LDO1. Input Power for LDO2, LDO3, LDO 4. Output Voltage Regulation Node for LDO2. Output Voltage Regulation Node for LDO3. Output Voltage Regulation Node for LDO4. Output Pin for Load Switch 2. Input Pin for Load Switches GOOD. Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.©

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VINL1VOL1VOL2VINL234VOL3VOL4VOUTLSW2VINLSWVOUTLSW1VOUTSB3WQFN-40L 5x5

DS5037-P00_RK August 2014

Preliminary

Pin No. 19 20 21 22 23 24 25 26 27 28 29 30 31 Pin Name VOUTLSW1 VOUTSB3 VOUTSB4 VOUTSB2 VINB3 LXB3 LXB4 VINB4 VINB2 LXB2 LXB1 VINB1 VOUTSB1 Output Pin for Load Switch 1. Output Voltage Regulation Node for Buck3. Output Voltage Regulation Node for Buck4. Output Voltage Regulation Node for Buck2. Input Power for Buck3. Pin Function RT5037

Internal Switch Node to Output Inductor Connection for Buck3. Internal Switch Node to Output Inductor Connection for Buck4. Input Power for Buck4. Input Power for Buck2. Internal Switch Node to Output Inductor Connection for Buck2. Internal Switch Node to Output Inductor Connection for Buck1. Input Power for Buck1. Output Voltage Regulation Node for Buck1. Power-On Reset Output and Reset Key Input. Open drain, Connect A Pull-Up Resister. The pin is high impedance after RT5037 booting 32 RESETB completely, otherwise, the pin is short to GND. Low pulse to triggers soft reset event. 33 34 CLKOUT PWRON RTC 32768Hz Clock Output. Open drain. Power On Key Input. Low pulse to triggers power-on event. Crystal Output. This pin’s parasitic capacitance should be kept as low as 35 XTALOUT possible. Noise interference should also be avoided. Crystal Input. This pin’s parasitic capacitance should be kept as low as 36 XTALIN possible. Noise interference should also be avoided. Standby Mode control pin. From low to high will trigger standby mode and 37 STB_EN from high to low will leave standby mode. 38 39 40 41 (Exposed Pad) SDA SCL IRQ PGND Data Input For I2C. Open Drain, Connect A Pull-Up Resister. Clock Input For I2C. Open Drain, Connect A Pull-Up Resister IRQ Output Node. Open drain. The exposed pad must be soldered to a large PCB and connected to PGND for maximum thermal dissipation and current flow. Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.©

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RT5037

Function Block Diagram

VDDAAnalog BasePreliminary

LDO1 100mAXTALINXTALOUTCLKOUT

VINB4LDO3 350mALXB4DCDC4 1.6ALDO4 350mAReal-Time Clock (RTC)LDO2 350mAVINL1VOL1VINL234VOL2VOL3VOL4VOUTSB4VINB3Load SW1 300mALoad SW2 300mAVINLSWVOUTLSW1VOUTLSW2

LXB3DCDC3 1.6AVOUTSB3VINB2Controller IC ProgrammableVINCHG2LXB2DCDC2 2AVMIDCHGVBOOTCHGVOUTSB2VINB1Charger 2A OTG 1ADCDC1 2ALXCHGISENSPISENSNPPCTRLLXB1VOUTSB1PWRONSCLSDAIRQSTB_ENRESETBState MachineVBATSTSPGNDCopyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.©

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Preliminary

Flow Chart

Power Channel Flow Chart

Power-OffRT5037

NoPlug Adaptor CheckYesPWRONCheckYesNoPower-On SequenceYesNoFalling edge at STB_ENNoNoRESETB CheckBuck1 to Buck4, LDO1 to LDO4 level reset to default value<00>Normal OperationRising-edge at 2STB_EN pin or IC Set STB_Trigger = <1>YesStandby ModeYesRESET_Actio<01>n Check<10>NoOverTemp CheckYesProtection CheckYesNoPWROFF CheckYesNoNoRESETB CheckBuck1 to Buck4, LDO1 to LDO4 level reset to Normal mode default value<00>Yesdelay1 power-off then delay2 power-on PMICPower-Offdelay1 Power-Off <01>RESET_Action Check<10>Note : RESETB Check : From “LOW“ to “HIGH” rising input into RESETB pin with 100ms debouncing time

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RT5037

Stand-By and Wake-Up Flow Chart

Preliminary

PMU operates with BuckxOutput_N[6:0]/LDOxOutput_N[6:0]/LSWxOutput_N[6:0]/Buckx_EN_N/LDOx_EN_N/LSWx_EN_N/IC SettingBuckxOutput_S[6:0]/LDOxOutput_S[6:0]/LSWxOutput_S[6:0]/Buckx_EN_S/LDOx_EN_S/LSWx_EN_S/2NoRising-edge at STB_EN pin or2 IC Set STB_Trigger = <1>YesYesPMU operates withBuckxOutput_S[6:0]/LDOxOutput_S[6:0]/LSWxOutput_S[6:0]/Buckx_EN_S/LDOx_EN_S/LSWx_EN_S/Falling-edge at STB_EN pinNoCopyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.©

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Preliminary

Protection Flow ChartPower-OffRT5037

NoPlug Adaptor CheckNoYesPower-On SequenceYesNoYesPWRONCheckFalling edge at STB_ENNoNormal OperationRising-edge at STB_EN pin or I2C Set STB_Trigger = <1>YesStandby ModeYesNoNo0 to 1 at Buckx_ENBuckxOutput LVYesNo0 to 1 at LDOx_ENLDOxOutput LVNoYesNo0 to 1 at LSWx_ENLSWxOutput LVNoYesYesYesBuckx Power-Off<0>BCKxLV_ENSHDNLDOx Power-Off<0>LDOxLV_ENSHDNLSWx Power-Off<0>LSWxLV_ENSHDN<1><1><1>NoVSYS LVNoVDDA LVNoPWROFFNoOver Temp.YesYesYesYes<0>VSYSLV_ENSHDN<0>VDDALV_ENSHDN<0>PWRON_ENSHDN<0>OT_ENSHDN<1><1>Power-Off<1><1>Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.©

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RT5037

Charger Flow Chart

Preliminary

NoVBAT < VPREC?YesCharge with IPRECNoFast-Charge WT_PRC[1:0] Timer Expired?YesWT_FC[2:0] Timer Expired?NoYesCharger DisabledNoKeep in CV ModeICHRG< IEOC?NoNoTermination is Enabled?End of ChargeVBATwww.richtek.com8

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Preliminary

Absolute Maximum Ratings (Note 1)



RT5037





Supply Input Voltage------------------------------------------------------------------------------------------------------- −0.3V to 10VVMIDCHG, VBOOTCHG-------------------------------------------------------------------------------------------------- −0.3V to 10VLXCHG------------------------------------------------------------------------------------------------------------------------ −0.3V to 6VVMIDCHG − VINCHG, VBOOTCHG − LXCHG----------------------------------------------------------------------- −0.3V to 6VOthers------------------------------------------------------------------------------------------------------------------------- −0.3V to 6VPower Dissipation, PD @ TA = 25°C

WQFN-40L 5x5-------------------------------------------------------------------------------------------------------------3.63WPackage Thermal Resistance (Note 2)

WQFN-40L 5x5, θJA--------------------------------------------------------------------------------------------------------27.5°C/WWQFN-40L 5x5, θJC-----------------------------------------------------------------------------------------------------------------------------------------------------6°C/WJunction Temperature------------------------------------------------------------------------------------------------------150°CLead Temperature (Soldering, 10 sec.)--------------------------------------------------------------------------------260°C

Storage Temperature Range--------------------------------------------------------------------------------------------- −65°C to 150°CESD Susceptibility (Note 3)

HBM (Human Body Model)-----------------------------------------------------------------------------------------------2kVMM (Machine Model)------------------------------------------------------------------------------------------------------200V

Recommended Operating Conditions (Note 4)



Supply Input Voltage-------------------------------------------------------------------------------------------------------4.3V to 5.5VJunction Temperature Range--------------------------------------------------------------------------------------------- −40°C to 125°CAmbient Temperature Range--------------------------------------------------------------------------------------------- −40°C to 85°C

Electrical Characteristics

(VINCHG = 5V, VISENSN = 4.2V, L = 1μH, CVINCHG = 4.7μF, CVBATS = 4.7μF, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit Input Power Source VINCHG Operation Range VINCHG Supply Current VINCHG Supply Current Leakage Current from Battery Protection VINCHG OVP Threshold Voltage VINCHG OVP Hysteresis ISENSN OVP (Note 4) Charger is switching, ICHG = 0, Buck loading = 0, LDOs loading = 0 Charger is not switching, ICHG = 0, Bucks loading = 0, LDOs loading = 0 VISENSN = 3.8V, VINCHG = 0V, Charger, Bucks and LDOs and LSWs are OFF. SCL = SDA = 0V. 4.3 -- 5.5 V -- 10 -- mA -- -- 5 mA -- -- 50 A 5.6 5.75 5.9 V -- 100 -- mV 110 117 124 % -- 10 -- % -- 165 -- C ISENSN OVP Hysteresis Over Temperature Protection

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RT5037

OTP Hysteresis Thermal Regulation Threshold Poor Source Detect Threshold Poor Source Detect Deglitch Poor Source Detect Hysteresis Current Sink to GND Detection Interval Sleep Mode Comparator Sleep-Mode Entry Threshold VINCHG ISENSN Sleep-Mode Exit Hysteresis VINCHG - ISENSN Sleep-Mode Deglitch Time VSLP VSLPEXIT tSLP Preliminary

Parameter Symbol Test Conditions Min Typ Max Unit Charge Current Begins To Reduce (Note 4) Bad Voltage Source Detection -- 10 -- C -- 120 -- C Input Power Source Detection 3.6 3.8 4 -- 30 -- V ms VINCHG Rising 100 -- 200 mV During Poor Source Detection Input Power Source Detection 3V < ISENSN < VBATREG, VINCHG Falling 3V < ISENSN < VBATREG, VINCHG Rising VINCHG Rising Above VSLP + VSLPEXIT -- 45 -- mA -- 2 -- s 0 0.04 0.1 V 40 120 200 mV -- 128 -- ms Under Voltage Lockout (UVLO) Threshold for VINCHG Charger Active Threshold Voltage Charger Active Hysteresis Minimum Input Voltage Regulation VMIVR Accuracy Average Input Current Regulation (AICR) Accuracy VDDA Regulator VDDA Voltage VDDA UVLO VDDA UVLO Hysteresis Battery Voltage Regulation Battery Voltage Regulation VBATREG Accuracy

VINCHG Rising, 3.05 3.3 3.45 V VINCHG Falling -- 150 -- mV Minimum Input Voltage Regulation (MIVR) VMIVR IAICR I2C per 0.1V IAICR = 100mA IAICR = 500mA IAICR = 1000mA VVINCHG > 4.5V VDDA Falling VDDA Rising I2C Programmable Per 25mV 0 to 85C 4.2 -- 4.8 V 5 -- 5 % 80 90 100 400 800 -- 2.4 -- 450 900 4.5 2.5 0.2 500 1000 -- 2.6 -- V V V mA VVINCHG < VISENSN -- VISENSN -- VBATREG 3.65 -- 4.4 V 1 -- 1 % www.richtek.com

DS5037-P00_RK August 2014

Preliminary

Parameter Symbol Test Conditions Re-Charge Threshold Re-Charge Deglitch (VBATREG  VREC) tREC VVBATS Falling, (VBATREG VREC) = programmable RT5037

Min Typ Max Unit 100 -- 300 mV -- 128 -- ms 2Charging Current Regulation Output Charging ICHG Current ICHG Accuracy Pre-Charge VPREC Threshold VPREC Accuracy Pre-Charge Current IPREC Accuracy IPREC IC Per 0.1A, RSENSE = 20m 0.7 -- 2 A RSENSE = 20m IC Per 0.1V, rising threshold 2-100 -- 100 mA 2.3 -- 3.8 V IC Per 100mA, from VBATS U100 mode : IPREC will fix 50mA 225 -- 5 % 150 -- 450 mA 20 -- 20 % Charge Termination Detection End of Charge Current IEOC Accuracy Deglitch Time for EOC IEOC tEOC IC per 50mA, RSENSE = 20m U100 mode : IEOC will fix 50mA RSENSE = 20m ICHG < IEOC, VISENSN > VREC IC 32//128/256us 222150 -- 600 mA 100 -- 100 mA 32 -- 256 s Charger Timer Protection FastCharge Timer PreCharge Timer Battery Detection Current Battery Detection Time NTC Monitor HOT Threshold WARM Threshold COOL Threshold COLD Threshold Accuracy of VTS Low Temperature Hysteresis Disable Threshold Battery Absent Detection IBATDET tBATDET IC per 2 Hrs IC 0.5/1/2/4 Hrs As RNTC is disable, after EOC Done As RNTC is disable, after EOC Done VTS falling, the ratio of VOL1, VINCHG > VIN(MIN) VTS falling, the ratio of VOL1, VINCHG > VIN(MIN) VTS rising, the ratio of VOL1, VINCHG > VIN(MIN) VTS rising, the ratio of VOL1, VINCHG > VIN(MIN) 4 0.5 -- -- 16 4 Hrs Hrs -- 0.5 -- mA -- 256 -- ms VVTS_HOT VVTS_WARM VVTS_COOL VVTS_COLD -- 28 -- %VOL1 -- 34 -- %VOL1 -- -- %VOL1 -- 74 -- %VOL1 2 -- 2 %VOL1 -- 1 -- %VPTS -- -- 5 %VPTS VVTS VVTS_OFF TS function disable VBAT_ABS VTS rising, the ratio of VPTS, VINCHG > VIN(MIN) -- 90 -- %VPTS Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.©

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RT5037

PWM Switching Charger Reverse Block On-Resistance High-Side On-Resistance Low-Side On-Resistance Charging Efficiency Oscillator Frequency Frequency Accuracy Maximum Duty Cycle Minimum Duty Cycle Peak OCP as Charger Mode RREV Preliminary

Parameter Symbol Test Conditions Min Typ Max Unit From VINCHG to VMIDCHG, as IAICR disable or IAICR = 2A -- 90 -- -- 200 -- -- 90 -- m m m VMIDCHG to LXCHG RHS From RLS fOSC From CHGLX to PGND VVINCHG = 5V, VISENSN = 4V, and ICHG = 1.5A, IC for 0.75/1.5 MHz At Minimum Voltage Input 2-- 85 -- % -- 1.5 -- MHz 10 -- 10 % -- 95 -- % 0 -- -- % 2.4 3 3.6 A Reverse Boost Mode Operation Output Voltage Level Output Voltage Accuracy To VMIDCHG, I2C per 25mV VMIDCHG setting ≧ VVBATS + 0.4 3.625 -- 5.2 V 3 -- 3 % VMIDCHG = 5V, VISENSN = 4V, and -- 85 -- % Efficiency Loading = 1A, MAX Output Current 1 -- -- A As VISENSN > 3.5V for VINCHG Peak Over Current 2.4 3.0 3.6 A Protection VMIDCHG OVP as -- 5.5 -- V Reverse Boost VMIDCHG OVP -- 200 -- mV Hysteresis Minimum Battery Voltage for Boost. IC Characteristics Output Low Voltage SCL /SDA Input Threshold Voltage SCL Clock

VOL VIL IDS = 10mA Logic Low Threshold -- -- -- -- -- -- 0.4 0.4 400 V V kHz 2VBATMIN As Boost Start-Up. IC programmable Per 0.1V 22.9 -- 3.6 V VIH Logic High Threshold 1.4 -- -- V Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.©

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DS5037-P00_RK August 2014

Preliminary

RT5037

Parameter Symbol Test Conditions Min Typ Max Unit Control I/O Pin Output Low Voltage (IRQ, RESETB) Logic Input Threshold Voltage (PWRON) VOL IDS = 10mA -- -- 0.4 V High Threshold VIH Logic VIL Logic Low Threshold 1.4 -- -- V -- -- 0.4 V LDO1 to LDO4, LSW1, LSW2 VINL1,VINL234 Input Voltage Range LDO1 to LDO4 Adjustable Output Range VVINL1,234 I2C per 25mV 2.7 -- 5.5 V 0.8 -- 3.3 V VVINL1, 234 = 4V, F = 1kHz, PSRR CVOL1 to 4 = 1F LDO1 to LDO4 MAX Current Output Current Limit for LDO1 to LDO4 Drop Out Voltage Internal Off Discharge VVINL1, 234 = 3V, IOUT = 150mA VVINLSW1, 2 = 3.3V, IOUT = 500mA -- 60 -- dB 350 -- -- mA 500 -- -- mA -- -- -- 1 150 -- mV k VINLSW1, VINLSW2 LSW Drop Out Voltage Output Current Limit for LSW1, LSW2 VINB1 to VINB4 Input Voltage Range Quiescent Current from VINB1 to VINB4 Shutdown Current from VINB1 to VINB4 Buck1 to Buck4 Adjustable Output Range Output Voltage Accuracy Output Voltage Accuracy High-Side On-Resistance Low -Side On-Resistance Buck 1, 2 Output Current capability Buck 1, 2 Output Current capability

2.7 -- 5.5 V -- 0.2 -- V 600 -- -- mA Synchronize Buck Regulator1 to Buck Regulator4 VBUCKVIN Loading = 0mA, no switch, Each one 2.7 -- 5.5 V -- 25 40 A -- 0.1 1 A 0.8 -- 3.3 V Each one VVOUTSB1 to 4 I2C per 25mV VVINB1 to 4 = 2.7V to 5.5V, VOUT  1V VVINB1 to 4 = 2.7V to 5.5V, VOUT  1V VVINB1 to 4 = 3.6V VVINB1 to 4 = 3.6V 3 -- 3 % 30 -- 30 mV -- -- 0.20 0.20 -- --   DC -- 2 -- A Peak -- 2.5 -- A Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.©

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RT5037

Parameter Symbol Output Voltage Accuracy Output Voltage Accuracy Buck 3, 4 Output Current capability Buck 3, 4 Output Current capability Oscillator Frequency Maximum Duty Cycle Soft-Start Time Discharge Time Line Regulation RTC RTC Operation Voltage RTC Quiescent Current RTC Clock RTC Clock Accuracy RTC Clock Output High RTC Clock Output Low RTC OSC Startup Time Preliminary

Test Conditions Min Typ Max Unit 3 3 % 30 30 mV -- 1.6 -- A -- 2 -- A -- 1.5 -- MHz 100 -- -- -- 0.1 -- 10 -- % ms %/V VVINL1 to 4 = 2.7V to 5.5V, VOUT > 1V VVINL1 to 4 = 2.7V to 5.5V, VOUT  1V DC Peak VVINB1 to 4 = 3.6V, Loading = 200mA COUT of Buck = 10F, (Note 5) TSS -- 150 -- s 2.4 -- 4.5 V RTCPWR > UVLO Threshold, XIN = XOUT = 14pF RTC Operation Voltage = 1.6V to 3.3V Pin C32K Source Out 0.1mA Pin C32K Sink 0.1mA -- -- 3 A -- 32.768 -- kHz 10 -- 10 ppm VDDA 0.3 -- -- -- V -- 0.3 V -- 0.5 1 s Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are

stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated inthe operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions mayaffect device reliability.

Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is

measured at the exposed pad of the package.

Note 3. Devices are ESD sensitive. Handling precaution is recommended.Note 4. The device is not guaranteed to function outside its operating conditions.Note 5. Guarantee By Design.

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DS5037-P00_RK August 2014

Preliminary

Typical Application Circuit

51µF36XTALIN35XTALOUTVINL234VSYS10µF2.2µHVOUTBS410µF21VSYS10µF2.2µHVOUTBS310µF20VSYS10µF2.2µHVOUTBS210µF22VSYS10µF2.2µHVOUTBS110µF31RPULL13334PWRON Button

0.1µFVIORPULL24039AP383732VIORPULL3H/W Reset Button41 (Exposed Pad)PGNDVOUTSB1CLKOUTPWRONISENSNPPCTRLVBATS7961µF+22µF10µFLXCHG29LXB1ISENSP30VMIDCHGVOUTSB2VINB1VBOOTCHG28LXB2243820m1µF47nF1µH4.7µF27VOUTSB3VINB2VINCHG14.3V to 5.5V10µF24LXB323VOUTSB4VINB3VINLSWVOL4161µF182.2µFVOUTLSW1191µFVOUTLSW2171µFVOUTLSW2VOUTLSW125LXB426VINB4VDDART5037VOL1121µF142.2µFVOL2131µFVOL3151µFVOL4VOL3VOL2VINL1111µFVOL1RT5037

VSYS / VOUTBSxVSYS / VOUTBSxVSYS / VOUTBSxFrom Adapter / USB10µFVSYSTo SystemVIOLi BatteryMust connect to VOL1RTSTS10RNTCIRQSCLSDASTB_ENRESETBCopyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.©

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RT5037

Timing Diagram

PMIC - POWER On/Off DIAGRAMTiming Based On/Off Sequence

Preliminary

Normal powe-on

START_TIMEPWRON

SHDN_PRESSNormal power-off

TSSBUCK1

TSSBUCK2

……

BUCK4

TSSTSSLDO1

...……

LDO8

RESETB_DLYRESETB

Level Based On/Off Sequence

Normal power on

START_TIMEPWRON

SHDN_PRESSNormal power off~80 %BUCK1BUCK2

~80 %~80 %~10%~10%……

BUCK4

~80 %LDO1

~10%……

LDO8

RESETB_DLYRESETB

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Preliminary

Abnormal Off

Normal power onSTART_TIMEPWRON

IRQ Even OccurAbnormal power offRT5037

IRQ

SHDN_DLYTIMEBUCK1

TSSBUCK2BUCK4

TSSLDO1

……

LDO8

RESETB_DLYRESETB

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RT5037

Standby mode and wake up by power-on

Preliminary

Sequentially (STANDBY_OFF = 1) example : Enable2, Enable4 turn-off

Turn into Standby by the rising edgeSTB_EN pin

Turn into Normal Operation by the falling edgeSTB_DLYSTB_DLY(Enable1)(Enable2)(Enable3)

TSS(Enable4)

STB_DLYTSSTSSSTB_DLYSTB_DLY……

(Enable8)

…RESETB_DLYEnable 4to 8 STB_DLYEnable 4 to 8 STB_DLYRESETB

RESETB keep high as standby modeImmediately (STANDBY_OFF = 0) example : Enable2, Enable4 turn-offTurn into Standby by the rising edgeSTB_EN pin

Turn into Normal Operation by the falling edgeSTB_DLY(Enable1)(Enable2)(Enable3)TSSSTB_DLY(Enable4)TSSEnable 4 to 8 STB_DLYRESETB_DLYRESETBTSSTSSSTB_DLY……(Enable8)RESETB keep high as standby modeCopyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.©

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Preliminary

Application Information

Switching Charger

The switching charger integrates a synchronous PWMcontroller with power MOSFETs to provide Minimum InputVoltage Regulation (MIVR), Average Input CurrentRegulation (AICR), high accuracy current and voltageregulation, and charge termination. The charger alsofeatures OTG-Boost (On-The-Go).

The switching charger has two operation modes: chargemode, and boost mode (OTG-Boost). In charge mode,the switching charger supports a precision chargingsystem for single cell. In boost mode, the switchingcharger works as the boost converter and boosts thevoltage from battery to VINCHG pin for sourcing the OTGdevices.

Notice that the switching charger does not integrate inputpower source (AC adapter or USB input) chargingdetection. Thus, the switching charger does not set thecharge current automatically. The charge current needsto be set via I2C interface by the host. The switching chargerapplication mechanism and I2C compatible interface areintroduced in later sections.

VINCHGRT5037

Charge Mode Operation

Minimum Input Voltage Regulation (MIVR)

The switching charger features Minimum Input VoltageRegulation function to prevent input voltage drop due toinsufficient current provided by the adaptor or USB input.If MIVR function is enabled, the input voltage decreaseswhen the over current of the input power source occurs.VINCHG is regulated at a predetermined voltage levelwhich can be set as 4.2V to 4.8V per 0.1V by I2C interface.At this time, the current drawn by the switching chargerequals to the maximum current value that the input powercan provide at the predetermined voltage level, instead ofthe set value.

Table 1. MIVR Register Setting Table

MIVR[2:0] VMIVR 000 Disable 001 4.2V 010 4.3V 011 4.4V 100 4.5V (default) 101 4.6V 110 4.7V 111 4.8V VMIDCHGVBOOTCHGGate Driver 2LXCHGProtection OVP, UVLO, OTP, TimerBase VDD, Ibias, VREF, OSCGate Driver 1Loop Control Charge Profile

The switching charger provides a precision Li-ion or Li-polymer charging solution for single-cell applications. Inputcurrent limit, charge current, termination current, chargevoltage and input voltage MIVR are all programmable viathe I2C interface. In charge mode, the switching chargerhas five control loops to regulate input current, chargecurrent, charge voltage, input voltage MIVR and devicejunction temperature. During the charging process, all fiveloops (if MIVR is enabled) are enabled and the dominantone will take over the control.

For normal charging process, the Li-ion or Li-polymerbattery is charged in three charging modes depending onthe battery voltage. At the beginning of the chargingprocess, the switching charger is in pre-charge mode.When the battery voltage rises above pre-charge threshold

VDDAPGNDSCLSDA2ICState MachineCurrent SenseISENSPISENSNPGNDIRQFigure 1. Switching Charger Function Block Diagram

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RT5037

Preliminary

Table 3. IPREC Register Setting Tablevoltage (VPREC), the switching charger enters fast-chargemode. Once the battery voltage is close to the regulationvoltage (VBATREG), the switching charger enters constantvoltage mode.Pre-Charge Mode

For life-cycle consideration, the battery cannot be chargedwith large current under low battery condition. When theVBATS pin voltage is below pre-charge threshold voltage(VPREC), the charger is in pre-charge mode with a weakcharge current witch equals to the pre-charge current(IPREC). In pre-charge mode, the charger basically worksas a Linear Charger. The pre-charge current also acts asthe current limit when the VBATS pin is shorted.The Pre-Charge current levels are 150mA to 450mAprogrammed by I2C per 100mA.

IPREC[1:0] Pre-Charge Current 00 150mA (Default) 01 250mA 10 350mA 11 450mA Fast-Charge Mode and Settings

As the VBATS pin rises above VPREC, the charger enters

fast-charge mode and starts switching. Notice that theswitching charger does not integrate input power source(AC adapter or USB input) detection. Thus, the switchingcharger does not set the charge current automatically.Unlike the linear charger (LDO), the switching charger(Buck converter) is a current amplifier. The current drawnby the switching charger is different from the current intothe battery. The user can set the Average Input CurrentRegulation (AICR) and output charge current (ICHRG)respectively.

Cycle-by-Cycle Current Limit

The charger of the switching charger has an embeddedcycle-by-cycle current limit for inductor. Once the inductorcurrent touches the threshold, the charger stops chargingimmediately to prevent over current from damaging thedevice. Notice that, the mechanism cannot be disabledby any way.

Average Input Current Regulation (AICR)

The AICR setting is controlled by I2C. The AICR100 modelimits the input current to 100mA. The AICR500 modelimits the input current to 500mA.. If the application doesnot need input current limit, it can be disabled also.The AICR levels are as below table and programmed byI2C and suitable for USB port and several TA types (5V/0.7A, 5V/1A, 5V/2A).

Table 2. VPREC Register Setting TableVPREC[2:0] Pre-Charge Threshold 0000 2.3V 0001 2.4V 0010 2.5V 0011 2.6V 0100 2.7V 0101 2.8V 0110 2.9V 0111 3V 1000 3.1V 1001 3.2V 1010 3.3V 1011 3.4V 1100 3.5V (Default) 1101 3.6V 1110 3.7V 1111 3.8V Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.©

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Table 4. AICR Register Setting TableRT5037

Constant Voltage Mode and Settings

The switching charger enters constant voltage mode when

000 Disable the ISENSN voltage is close to the output-charge voltage001 0.1A (VBATREG). Once in this mode, the charge current begins010 0.5A to decrease. For default settings (charge current011 0.7A termination is disabled), the switching charger does not100 0.9A (Default) turn off and always regulates the battery voltage at VBATREG.

However, once the charge current termination is enabled,

101 1A the charger terminates if the charge current is below

110 1.5A termination current (IEOC) in constant-voltage mode. The

111 2A charge current termination function is controlled by theI2C interface. After termination, a new charge cycle restartsCharge Current (ICHRG)

when one of the following conditions is detected :The charge current into the battery is determined by the

sense resistor (RSENSE) and ICC setting by I2C. The voltage The VBATS pin voltage falls below the VBATREG asbetween the ISENSP and ISENSN pins is regulated toVREC threshold.the voltage control by ICC setting.

 VINCHG Power-On Reset (POR).

As the RSENSE is 20mΩ, the Fast-Charge currents are

 Charge or Termination Enable bit toggle or Charger reset

700mA to 2A programmed by IC per 100mA.

(via I2C interface).

Table 5. ICHG Register Setting Table

AICR[2:0] IAICR ICHG[3:0] VCC ICHG RSENSE is 20m 0000 10mV 0001 12mV 0010 14mV 0011 16mV 0100 18mV 0101 20mV 0110 22mV 0111 24mV 1000 26mV 1001 28mV 1011 32mV 1100 34mV 1101 36mV 1110 38mV 1111 40mV 0.5A 0.6A 0.7A 0.8A 0.9A 1A 1.1A 1.2A 1.3A 1.4A 1.6A 1.7A 1.8A 1.9A 2A Output Charge Voltage (VBATREG)

The output-charge voltage is set by the I2C interface. Its

range is from 3.65V to 4.4V per 25mV.Termination Current (IEOC)

If the charger current termination is enabled (TE bit =“1”), the end-of-charge current is determined by both thetermination current sense voltage (VEOC) and senseresistor (RSENSE). As RSENSE is 20mΩ, IEOC is set by theI2C interface from 150mA to 600mA per 50mA.

Table 6. EOC Register Setting Table

EOC[2:0] VEOC IEOC RSENSE is 20m 000 Disable 001 3mV 010 4mV 100 6mV 101 8mV 110 10mV 111 12mV Disable 150mA 200mA 300mA 400mA 500mA 600mA 1010 30mV 1.5A (Default) 011 5mV 250mA (default) Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.©

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RT5037

Input Voltage Protection in Charge Mode

Preliminary

OVP threshold. When OVP occurs, the boost converterstops switching and turns off immediately.Battery Protection

Battery Over-Voltage Protection in Charge ModeThe switching charger monitors the ISENSN voltage foroutput over voltage protection. In charge mode, if theISENSN voltage rises above VOVP_BAT x VBATREG, such aswhen the battery is suddenly removed, the switchingcharger stops charging and then sets fault status bitsand sends out fault pulse at the STAT pin. The conditionis released when the ISENSN voltage falls below (VOVP_BAT− ΔVOVP_BAT) x VOVP_BAT. The switching charger thenresumes charging process with default settings and thefault is cleared.Bucks

During charge mode, there are two protection mechanismsagainst if input power source capability is less than thecharging current setting. One is AICR and the other isminimum input voltage regulation. A suitable level of AICRcan prevent VINCHG drop by the insufficient capability.As the AICR setting is not suitable, MIVR will regulatethe VINCHG in the setting level and sink the maximumcurrent of power source.

Sleep Mode (VVINCHG − VVBATS < VSLP)

The switching charger enters sleep mode if the voltagedrop between the VINCHG and VBATS pins falls belowVSLP. In sleep mode, the reverse blocking switch andPWM are all turned off. This function prevents battery drainduring poor or no input power source.Input Over Voltage Protection

When VINCHG rises above the input over voltage threshold,the switching charger stops charging and then sets faultstatus bits. The condition is released when VINCHG fallsbelow OVP threshold. The switching charger thenresumes charging operation.

Reverse Boost Mode Operation (OTG)Trigger and Operation

The switching charger features OTG-Boost support. WhenOTG function is enabled, the synchronous boost controlloop takes over the power MOSFETs and reverses thepower flow from the battery to the VINCHG pin. In normalboost mode, the VMIDCHG pin is regulated to 5V (typ.)to support other OTG devices connected to the USBconnector.

Output Over-Voltage Protection

In boost mode, the output over voltage protection istriggered when the VMIDCHG voltage is above the output

The RT5037 includes a synchronous step-down DC/DCconverter that can support the input voltage range from2.7V to 5.5V. The output current is up to 600mA. Theoutput voltage can be programmable by I2C. Followingshows the function block of the RT5037 buck.

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VINB1 to VINB4RT5037

UVLO Bias SupplyThermal ShutdownVREFCurrent Limit DetectPWM Control LogicVOUTSB1 to VOUTSB4PGNDBandgapGate Driver LXB1 to LXB4Soft-StartOscillatorNegative Inductor Current DetectFigure 2. Buck Function Block Diagram

Normally, the high-side MOSFET is turned on by the PWMcontrol logic block which drives the gate driver block whenVOUTSB1 to VOUTSB4 is lower than the internalreference voltage. After VOUTSB1 to VOUTSB4 is higherthan the internal reference voltage, the high side MOSFETwill be turned off. While the high side MOSFET is turnedoff, the low side MOSFET is turned on until the current ofthe inductor is around zero by the negative inductor currentdetection block.

When the current of high side MOSFET is over the ratingcurrent, the high side MOSFET is turned off. When thetemperature is over the rating temperature, the high side

MOSFET is turned off until the temperature is dropped bythe thermal shutdown block. After the thermal shutdownis released, VOUTSB1 to VOUTSB4 will be soft-startedagain.

IRQ Operation

RT5037 summarize all IRQ items in the register table. AllIRQ_status registers are implemented as reset after read.And IRQ pin is released only after IRQ_PRez bit is set. IfIRQ Mask bit is High, the IRQ_status bit will not updatestatus. IRQ_enable will mask IRQ_status to trigger IRQLow, so the system can decide which interrupt isnecessary.

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RT5037

I2C Interface

RT5037 I2C slave address = 7'b0111000.

Preliminary

I2C interface support fast mode (bit rate up to 400kb/s). The write or read bit stream (N ≥ 1) is shown below :

Read N bytes from RT5037

Slave AddressSR/W0AAssume Address = mMSBData 2LSBAData for Address = m+1Write N bytes to RT5037

Slave AddressSR/W0AAssume Address = mRegister AddressAData for Address = mMSBData NMSBData 1MSBData NRegister AddressASrSlave Address1AData for Address = mLSBAData for Address = m+N-1LSBAData for Address = m+1LSBAPData for Address = m+N-1Driven by Master, Driven by Slave (RT5033),

PStop,

SStart,

SrRepeat Start

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I2C Registers TableSwitching Charger Parts

RT5037

Name Function Addr ID ID 0x00 0x36 Bit Mode name Reset Value Description [7:4] R VENDOR_ID

Name Function Addr CHGControl1 Charger Control1 0x01 0x90 Bit Mode name Reset 0011 Vendor Identification [3:0] R CHIP_REV_ID 0110 CHIP_REV_ID Reset Reset Value Description AICR setting : 000 - Disable 001 - 0.1A 010 - 0.5A [7:5] R/W IAICR[2:0] 100 011 - 0.7A 100 - 0.9A (default) 101 - 1.0A 110 - 1.5A 111 - 2A The OCP level of buck mode selection bit 4 R/W Higher_OCP 1 0 - OCP = 3A, 1 - OCP = 4A 3 R/W TE Termination enable 0 1 - Enable charge current termination, 0 - Disable charge current termination The switching frequency selection bit (Charger/OTG) 0 0 - the switching frequency is 1.5MHz, 1 - the switching frequency is 0.75MHz 1-High impedance mode, 0-Not high impedance mode (default 0) 1 - Boost mode for OTG 0 0 - Charger mode (default 0) 0 2 R/W Sel_SWFreq 1 R/W HZ 0 R/W OPA_MODE

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CHGControl2 Charger Control2 Bit Mode name Preliminary

Reset 0x58 Name Function Addr 0x02 [7:2] R/W [1:0] R/W

Reset Value Description Battery regulation voltage. The delta-V of the Battery regulation voltage is 25mV. 00 0000 - CHG: 3.65V, OTG: 3.625V 00 0001 - CHG: 3.675V, OTG: 3.65V 00 0010 - CHG: 3.7V, OTG : 3.675V 00 1101 - CHG: 3.975V, OTG: 3.95V ... 00 1110 - CHG: 4V, OTG: 3.975V 00 1111 - CHG: 4.025V, OTG: 4V ... CV[5:0] 010110 01 0110 - CHG: 4.2V, OTG: 4.175V (default) 01 1010 - CHG: 4.3V, OTG: 4.275V … 01 1011 - CHG: 4.325V, OTG: 4.3V 01 1100 - CHG: 4.350V, OTG: 4.325V 01 1101 - CHG: 4.375V, OTG: 4.35V 01 1110 - CHG: 4.4V, OTG: 4.375V … 11 0111 - CHG: 4.4V, OTG: 5.0V … 11 1110 - CHG: 4.4V, OTG: 5.175V 11 1111 - CHG: 4.4V, OTG: 5.2V Reserved 00 Reserved Name Function Addr CHGControl3 Charger Control3 0x04 Bit Mode name Reset Value Reset 0xFF Description 7 R/W PP_BCK_SEL EOC termination behavior selection. It’s only works when SW_HW_CTRL = 1 0 : Disable Buck and supply power from power path 1 PMOS. 1 : Disable Power Path MOS (Power supplied from Buck). (Default) Charger OTG enable 1 0 – Charger and OTG mode are disabled, 1 – Charger and OTG mode can be enabled Fast charge Timer 000 – 4hrs 111 001 – 6hrs 010 – 8hrs 011 – 10hrs 6 R/W CHGOTG_EN [5:3] R/W WT_FC[2:0]

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Bit Mode name RT5037

Reset Value Description 100 – 12hrs 101 – 14hrs [5:3] R/W WT_FC[2:0] 111 110 – 16hrs 111 – 16hrs Pre-charge charge Timer 00 – 0.5 hrs [2:1] R/W WT_PRC[1:0] 11 01 – 1hrs 10 – 2hrs 11 – 4hrs 0 - Disable internal timer function, 0 R/W EN_TMR 1 1 - Enable internal timer function (default 1)

Name Function Addr CHGControl4 Charger Control4 0x05 Bit Mode name Reset 0x83 Reset Value Description VMIVR 000 - Disable 001 - 4.2V 010 - 4.3V [7:5] R/W MIVR[2:0] 100 … 100 – 4.5V (default) 101 - 4.6V 110 - 4.7V 111 - 4.8V Pre-Charge Current 00 - 150mA (default) [4:3] R/W IPREC[1:0] 00 01 - 250mA 10 - 350mA 11 - 450mA Termination Current (IEOC RSENSE is 20m ) 000 - Disable 001 - 150mA 010 - 200mA [2:0] R/W EOC[2:0] 011 011 - 250mA (default) 100 - 300mA 101 - 400mA 110 - 500mA 111 - 600mA

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RT5037

Bit Mode name Preliminary

Reset 0xAC Name Function Addr CHGControl5 Charger Control5 0x06 Reset Value Description Charging regulation current External Sensing R : Charge current sense voltage (current equivalent for 20m sense resistor) 0000 - 10mV (0.5A) 0001 - 12mV (0.6A) 0010 - 14mV (0.7A) 0011 - 16mV (0.8A) [7:4] R/W ICHG[3:0] 1010 …………. 1010 - 30mV (1.5A) (default) …………. 1100 - 34mV (1.7A) 1101 - 36mV (1.8A) 1110 - 38mV (1.9A) 1111 - 40mV (2A) Pre-Charge Threshold (Rising threshold with hysteresis of 200mV) 0000 - 2.3V 0001 - 2.4V … 0100 - 2.7V [3:0] R/W VPREC[3:0] 1100 0101 - 2.8V … 1100 – 3.5 (default) 1101 – 3.6V 1110 – 3.7V 1111 - 3.8V

Name Function Addr CHGControl6 Charger Control6 Bit Mode Name 7 R/W Reserved 6 R/W TMR_PAUSE Reverse Block 5 R/W ON/OFF [4:3] R/W Reserved 0x07 1 Reserved 0 1 0 – Internal timer keeps counting (default) 1 – Internal timer stops counting Reset Value Reset 0xBC Description [2:0] R/W BATLV 0 – Turn Off Reverse Block as OTG mode 1 – Turn On Reverse Block as OTG mode 11 Reserved Low battery voltage threshold (Falling threshold with hysteresis of 400mV) 000 : 2.5V 001 : 2.6V 010 : 2.7V 100 011 : 2.8V (default) 100 : 2.9V 101 : 3V 110 : 3.1V 111 : 3.2V

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Name Function Addr CHGControl7 Charger Control7 0x08 Bit Mode Name Reset Value RT5037

Reset 0x01 Description 7 R/W CC_JEITA Charging current setting bit for JEITA 0 1 – ICHG / 2, 0 – ICHG, When OTG OLP occurs, 0 0 : Enter HZ mode (Default) 1 : Disable UUG only and reverse boost keeps working. 00 Reserved Re-Charge Level 00 – CV-0.1V 00 01 – CV-0.2V. 10 – CV-0.3V. 11 – CV-0.3V. 0 Reserved TS shutdown ENABLE for TSHOT and TSCOLD. 1 0 : Disable TS shutdown function. 1 : Enable TS shutdown function. (Default) Reset 0x00 Description 6 R/W OTG_OLP_BLK [5:4] R/W Reserved [3:2] R/W VRECHG 1 R/W 0 R/W Reserved TS_EN Name Function Addr RESET of CHG Bit Mode RESET of CHG Name 0x09 Reset Value 7 R/W CHG_RST [6:0] R/W Reserved Write this bit to reset charger related registers 0 1 – Charger in reset mode, 0 – No effect, Read : always get “0” 0000000 Reserved Reset 0x00 Description Name Function Addr CHG_IRQ1 Charger IRQ1 0x10 Bit Mode Name Reset Value 7 R Reversed 6 R VINOVPI 5 R 4 3 2 1 R R R R IEOCI PPBATLVI VINCHG_Plugin VINCHG_Plugout CHBADADPI 0 Reversed CHGVIN over voltage protection. Set when CHGVIN > 0 VIN_OVP is detected Charging is terminated. It would not be triggered if TE bit 0 is low. 0 BAT is in low level (power path need to be turned off) 0 0 0 1 : VINCHG connected, 0 : Not connected 1 : VINCHG removed, 0 : Not removed Charger fault. Bad VIN source (Input source detect) Detection result of battery absence detection 0 : Battery exists 1 : Detected battery-absence from battery detection of 0 R BAT_Absence 0 either one： a. TS > 90%*VPTS b. Battery detection when EOC c. Battery absence when adapter plug-in Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.©

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RT5037

Bit Mode 7 R 6 R Name Preliminary

Reset 0x00 Description Name Function Addr CHG_IRQ2 Charger IRQ2 0x11 Reset Value CHRVPI Reserved Charger fault. Reverse protection fault (VIN < BATS + 0 VSLP) 0 Reserved 0 Charger fault. Battery OVP The charging current is lower than end-of-charge 0 current. The charger keeps charging. 0 Re-Charge request. 0 Charger fault. Time-out (fault) 00 Reserved Reset 0x00 Description 5 R CHBATOVI 4 R CHTERMI 3 R CHRCHGI 2 R CHTMRFI Reserved [1:0] R Name Function Addr CHG_IRQ3 Charger IRQ3 0x12 Bit Mode 7 5 0

R R R Name BSTVMIDOVP CHBSTLOWVI Reserved CHG_STAT2 _ALT Reset Value 0 0 0 Boost fault. VMID OVP Charge or Boost fault. Battery voltage is too low Any Event in CHG_STAT2 changes, IRQ indicator. [4:1] R 0000 Reserved Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.©

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Name Function Addr CHG_IRQ1_MASK Charger IRQ1 Mask Bit Mode 7 R/W Name Reversed 0x13 Reset Value 0 Reversed CHGVIN OVP fault interrupt mask 0 0 – interrupt is not masked, 1 – interrupt is masked Charge terminated interrupt mask 0 0 – Interrupt is not masked 1 – Interrupt is masked RT5037

Reset 0x0C Description 6 R/W VINOVPIM 5 R/W IEOCM 4 R/W PPBATLVM BAT is in low level (power path need to be turned off) 0 0 – Interrupt is not masked 1 – Interrupt is masked VINCHG connected, IRQ interrupt mask (UVP detects VINCHG > UVLO) 3 R/W VINCHG_PluginM 1 0 – Interrupt is not masked 1 – Interrupt is masked VINCHG removed, IRQ interrupt mask (UVP detects VINCHG < UVLO) 2 R/W VINCHG_PlugoutM 1 0 – Interrupt is not masked 1 – Interrupt is masked 1 R/W Reversed 0 Reversed BAT absence interrupt mask. 0 0 – Interrupt is not masked 1 – Interrupt is masked 0 R/W BAT_Absence

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RT5037

Preliminary

Name Function Addr Reset CHG_IRQ2_ Charger IRQ2 0x14 0x80 MASK Mask Bit Mode Name Reset Value Description 7 R/W CHRVPIM 6 R/W Reserved 5 R/W CHBATOVIM Charger reverse protection interrupt mask 1 0 – Interrupt is not masked 1 – Interrupt is masked 0 Reserved Charger battery over voltage interrupt mask 0 0 – Interrupt is not masked 1 – Interrupt is masked Charge current is lower than EOC current interrupt mask 0 0 – Interrupt is not masked, 1 – Interrupt is masked Charger Re-Charge request interrupt mask 0 0 – Interrupt is not masked, 1 – Interrupt is masked Charger timeout interrupt mask 0 0 – Interrupt is not masked, 1 – Interrupt is masked 00 Reserved 4 R/W CHTERMIM 3 R/W CHRCHGIM 2 R/W CHTMRFIM [1:0] R/W

Reserved Name Function Addr Reset CHG_IRQ3_ Charger IRQ3 0x15 0x0F MASK Mask Bit Mode Name Reset Value Description Boost VMID over voltage interrupt mask 7 R/W BSTVMIDOVPM 0 0 – Interrupt is not masked, 1 – Interrupt is masked 5 R/W BSTLOWVIM 4 R/W Reserved CHG_STAT2 0 R/W _ALTM

Boost mode low battery voltage interrupt mask 0 0 – Interrupt is not masked, 1 – Interrupt is masked 0 Reserved 0 Any Event in CHG_STAT2 changes, interrupt mask 0 – Interrupt is not masked, 1 – Interrupt is masked Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.©

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Name Function Addr CHG_STAT Charger status 0x16 Bit Mode Name Reset Value RT5037

Reset 0x02 Description Control external PPC PMOS on/off 7 R/W EXT_PMOS_CTRL 0 0 - Disable PMOS 1 - Enable PMOS Battery voltage level: 6 R VBAT_VL 0 0: Battery voltage is lower than pre-charge level 1: Battery voltage is higher than pre-charge level Charging Status 00：Ready to charge 00 01：Charge in progress 10：Charge Done 11：Charge Fault 0 1 : Boost mode, 0 : Not in Boost mode [5:4] R CHG_STAT 3 R BOOST_STAT 2 R Reserved 0 Reserved Power path control by SW or HW 1 R/W SW_HW_CTRL 1 0 - Software decide 1 - Hardware decide Charge Disable 0 R/W CHG_ENB 0 1 - charger is disabled, 0 - charger is enabled

Name Function Addr CHG_STAT2 Charger STAT2 0x17 Bit Mode Name Reset Value Reset 0x00 Description 7 R PWR_RDY Power status bit 0 : CHGVIN > VOVP 0 or CHGVIN < ISENSN + VSLP (Power Fault) 1 : CHGVIN < VOVP & CHGVIN > ISENSN + VSLP (Power Ready) Charger warning. 0 0 - Thermal regulation loop inactive. 1 - Thermal regulation loop active. Charger warning. 0 0 - MIVR regulation loop inactive. 1 – MIVR regulation loop active. Charger warning. AICR regulation loop active. 0 0 - AICR regulation loop inactive. 1 - AICR regulation loop active. Battery HOT Fault 0 –TS not in HOT region 0 1 – TS in HOT region, and charger disabled automatically. 6 R CHTREGI 5 R CHMIVRI 4 R CHGAICRI 3 R TSHOT

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RT5037

Bit Mode 2 R TSWAR Preliminary

Name Reset Value Description Battery WARM Fault 0 0 –TS not in WARM region 1 – TS in WARM region Battery COOL Fault 1 R TSCOOL 0 0 –TS not in COOL region 1 – TS in COOL region Battery COLD Fault 0 – TS not in COLD region 0 R TSCOLD 0 1 – TS in COLD region, and charger disabled automatically.

Name Function Addr CHG_STAT2_MASK Charger STAT2_MASK Reset 0x18 0x70 Description Bit Mode Name Reset Value Charger Power ON Ready, interrupt mask 7 R/W PWR_RDYM 0 0 – Interrupt is not masked, 1 – Interrupt is masked Charger warning. Thermal regulation loop active, interrupt mask 6 R/W CHTREGIM 1 0 – Interrupt is not masked, 1 – Interrupt is masked Charger warning. Input voltage MIVR loop active, interrupt mask 5 R/W CHMIVRIM 1 0 – Interrupt is not masked, 1 – Interrupt is masked Charger warning. AICR regulation loop active, interrupt mask 4 R/W CHGAICRIM 1 0 – Interrupt is not masked, 1 – Interrupt is masked 3 R/W TSHOTM Battery HOT Fault, , interrupt mask 0 0 – Interrupt is not masked, 1 – Interrupt is masked Battery WARM Fault, interrupt mask 2 R/W TSWARMM 0 0 – Interrupt is not masked, 1 – Interrupt is masked 1 R/W TSCOOLM Battery COOL Fault, interrupt mask 0 0 – Interrupt is not masked, 1 – Interrupt is masked Battery COLD Fault, interrupt mask 0 0 – Interrupt is not masked, 1 – Interrupt is masked 0 R/W TSCOLDM

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PMIC PartsRT5037

Name Function Addr Reset BUCK1 Control BUCK1 Output 0x41 0x08 Normal Control Bit Mode Name Reset Value Description IRQ pin reset trigger. From low to high will reset IRQ pin 7 R/W IRQ_PRez 0 and keep it in low within Tmsk, and after Tmsk expired. IRQ_PRez will be set to “0” Buck1 output voltage regulation (default by OTP 0000000 – 0.8V, 25mV per step 0000001 – 0.825V -- Buck1 0010000 – 1.2V [6:0] R/W 0001000 Output_N[6:0] -- 0011100 – 1.5V. -- 1100101 – 3.3V 1111111 – 3.3V Name Function Addr BUCK1 Control Standby 7 R/W BUCK1 Output Control Reversed Reset 0x71 0x0C Description Bit Mode Name Reset Value 0 Buck1 [6:0] R/W Output_S [6:0] 0001100 Reversed Buck1 output voltage regulation (default by OTP) 0000000 – 0.8V, 25mV per step 0000001 – 0.825V -- 0010000 – 1.2V -- 0011100 – 1.5V. -- 1100101 – 3.3V 1111111 – 3.3V Name Function Addr Reset BUCK2 BUCK2 Control Output 0x42 0x08 Normal Control Bit Mode Name Reset Value Description 7 R/W Reversed 0 Reversed Buck2 output voltage regulation (default by OTP) 0000000 – 0.8V, 25mV per step 0000001 – 0.825V -- 0010000 – 1.2V -- 0011100 – 1.5V -- 1100101 – 3.3V 1111111 – 3.3V www.richtek.com

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RT5037

BUCK2 Control Standby 7 R/W BUCK2 Output Control Name Reversed Preliminary

Reset Name Function Addr 0x72 0x0C Reset Value 0 Description Bit Mode Buck2 Output_S [6:0] R/W [6:0] 0001100 Reversed Buck2 output voltage regulation (default by OTP) 0000000 – 0.8V, 25mV per step 0000001 – 0.825V -- 0010000 – 1.2V -- 0011100 – 1.5V. -- 1100101 – 3.3V 1111111 – 3.3V

Name Function Addr Reset BUCK3 Control BUCK3 Output 0x43 0x58 Normal Control Bit Mode Name Reset Value Description 7 R/W Reversed 0 Reversed Buck3 output voltage regulation (default by OTP) 0000000 – 0.8V, 25mV per step 0000001 – 0.825V -- 0010000 – 1.2V -- 0011100 – 1.5V. -- 1100101 – 3.3V 1111111 – 3.3V Reset Buck3 Output_N [6:0] R/W [6:0] 1011000

Name Function Addr BUCK3 Control Standby 7 R/W BUCK3 Output Control Name Reversed 0x73 0x58 Reset Value 0 Description Bit Mode Buck3 Output_S [6:0] R/W [6:0] 1011000 Reversed Buck3 output voltage regulation (default by OTP) 0000000 – 0.8V, 25mV per step 0000001 – 0.825V -- 0010000 – 1.2V -- 0011100 – 1.5V. -- 1100101 – 3.3V 1111111 – 3.3V

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Preliminary

RT5037

Name Function Addr Reset BUCK4 Control BUCK4 Output 0x44 0x10 Normal Control Bit Mode 7 R/W Name Reversed Reset Value 0 Description Reversed Buck4 output voltage regulation (default by OTP) 0000000 – 0.8V, 25mV per step 0000001 – 0.825V -- 0010000 – 1.2V -- 0011100 – 1.5V. -- 1100101 – 3.3V 1111111 – 3.3V Reset Buck4 Output_N [6:0] R/W [6:0] 0010000

Name Function Addr BUCK4 Control Standby 7 R/W BUCK4 Output Control Name Reversed 0x74 0x10 Reset Value 0 Description Bit Mode [6:0] R/W Buck4 Output_S[6:0] 0010000 Reversed Buck4 output voltage regulation (default by OTP) 0000000 – 0.8V, 25mV per step 0000001 – 0.825V -- 0010000 – 1.2V -- 0011100 – 1.5V. -- 1100101 – 3.3V 1111111 – 3.3V Reset

Name Function Addr BUCK VRC Control BUCK VRC Normal Control Bit Mode Name 0x45 Option Reset Value Description VRC Setting [7:6] R/W Buck1 VRC_N[1:0] 00 00 – 25mV/10s, 01 – 50mV/10s, 10 – 75mV/10s,11 – 100mV/10s, VRC Setting [5:4] R/W Buck2 VRC_N[1:0] 00 00 – 25mV/10s, 01 – 50mV/10s, 10 – 75mV/10s,11 – 100mV/10s, VRC Setting [3:2] R/W Buck3 VRC_N[1:0] 00 00 – 25mV/10s, 01 – 50mV/10uS, 10 – 75mV/10s,11 – 100mV/10s, VRC Setting [1:0] R/W Buck4 VRC_N[1:0] 00 00 – 25mV/10s, 01 – 50mV/10s, 10 – 75mV/10s,11 – 100mV/10s, Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.©

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RT5037

BUCK VRC Control Standby Bit Mode BUCK VRC Control Name Preliminary

Reset Name Function Addr 0x75 Option Reset Value Description VRC Setting [7:6] R/W Buck1 VRC_S[1:0] 00 00 – 25mV/10s, 01 – 50mV/10s, 10 – 75mV/10s, 11 – 100mV/10s, VRC Setting [5:4] R/W Buck2 VRC_S[1:0] 00 00 – 25mV/10s, 01 – 50mV/10s, 10 – 75mV/10s, 11 – 100mV/10s, VRC Setting [3:2] R/W Buck3 VRC_S[1:0] 00 00 – 25mV/10s, 01 – 50mV/10s, 10 – 75mV/10s, 11 – 100mV/10s, VRC Setting [1:0] R/W Buck4 VRC_S[1:0] 00 00 – 25mV/10s, 01 – 50mV/10s, 10 – 75mV/10s, 11 – 100mV/10s,

Name Function Addr Reset BUCK VRC Enable BUCK VRC 0x46 0xF0 Normal Enable Bit Mode Name Reset Value Description Buck1 VRC Normal 0 – Disable – voltage ramps up to target voltage with 1 one time 1 – Enable – voltage ramps up to target voltage with slope control Buck2 VRC Normal 0 – Disable – voltage ramps up to target voltage with 1 one time 1 – Enable – voltage ramps up to target voltage with slope control Buck3 VRC Normal 0 – Disable – voltage ramps up to target voltage with 1 one time 1 – Enable – voltage ramps up to target voltage with slope control Buck4 VRC Normal 0 – Disable – voltage ramps up to target voltage with 1 one time 1 – Enable – voltage ramps up to target voltage with slope control 7 R/W Buck1VRC_EN_N 6 R/W Buck2VRC_EN_N 5 R/W Buck3VRC_EN_N 4 R/W Buck4VRC_EN_N [3:0] R/W

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DS5037-P00_RK August 2014

Preliminary

Name Function Addr BUCK VRC Enable Standby Bit Mode BUCK VRC Enable Name RT5037

Reset 0x76 0xF0 Reset Value Description Buck1 VRC Normal 0 – Disable – voltage ramps up to target voltage with one 7 R/W Buck1VRC_EN_S 1 time 1 – Enable – voltage ramps up to target voltage with slope control Buck2 VRC Normal 0 – Disable – voltage ramps up to target voltage with one 6 R/W Buck2VRC_EN_S 1 time 1 – Enable – voltage ramps up to target voltage with slope control Buck3 VRC Normal 0 – Disable – voltage ramps up to target voltage with one 5 R/W Buck3VRC_EN_S 1 time 1 – enable – voltage ramps up to target voltage with slope control Buck4 VRC Normal 0 – Disable – voltage ramps up to target voltage with one 4 R/W Buck4VRC_EN_S 1 time 1 – Enable – voltage ramps up to target voltage with slope control [3:0] R/W

Name Function Addr BUCK Mode Bit Mode BUCK Mode 0x47 Name Reset Value Reset 0x0F Description Reversed 0000 Reversed 7 R/W Buck1mode Buck1 mode 0 0 – Force PWM 1 – Auto Mode (PSM/PWM) Buck2 mode 0 0 – Force PWM 1 – Auto Mode (PSM/PWM) Buck3 mode 0 0 – Force PWM 1 – Auto Mode (PSM/PWM) Buck4 mode 0 0 – Force PWM 1 – Auto Mode (PSM/PWM) Buck1 output off mode state 1 0 – floating 1 – Ground-discharged 6 R/W Buck2mode 5 R/W Buck3mode 4 R/W Buck4mode 3 R/W Buck1oms

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RT5037

Bit Mode 2 R/W Buck2oms Preliminary

Name Reset Value Description Buck2 output off mode state 1 0 – Floating 1 – Ground-discharged Buck3 output off mode state 1 0 – Floating 1 – Ground-discharged Buck4 output off mode state 1 0 – Floating 1 – Ground-discharged Reset 1 R/W Buck3oms 0 R/W Buck4oms

Name Function Addr LDO1Control LDO1 Output 0x48 0x10 Normal Control Bit Mode Name Reset Value Description 7 R/W Reversed 0 Reversed LDO1 output voltage regulation (default by OTP) 0000000 – 0.8V, 25mV per step 0000001 – 0.825V -- 0010000 – 1.2V -- 0011100 – 1.5V. -- 1100101 – 3.3V 1111110 – 3.3V 1111111 – Full On Reset [6:0] R/W LDO1 Output_N[6:0] 0010000

Name Function Addr LDO1Control Standby Bit Mode 7 R/W LDO1 Output Control Reversed 0x78 0x58 Description Name Reset Value 0 [6:0] R/W LDO1 Output_S [6:0] 1011000 Reversed LDO1 output voltage regulation (default by OTP) 0000000 – 0.8V, 25mV per step 0000001 – 0.825V -- 0010000 – 1.2V -- 0011100 – 1.5V. -- 1100101 – 3.3V 1111110 – 3.3V 1111111 – Full On

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Preliminary

RT5037

Name Function Addr Reset LDO2 Control LDO2 Output 0x49 0x08 Normal Control Bit Mode Name Reset Value Description 7 R/W Reversed 0 Reversed LDO2 output voltage regulation (default by OTP) 0000000 – 0.8V, 25mV per step 0000001 – 0.825V -- 0010000 – 1.2V -- 0011100 – 1.5V. -- 1100101 – 3.3V 1111110 – 3.3V 1111111 –Full On Reset [6:0] R/W LDO2 Output_N [6:0] 0001000 LDO2 Control Standby Bit Mode 7 R/W LDO2 Output Control Reversed Name Function Addr 0x79 0x0C Description Name Reset Value 0 [6:0] R/W LDO2 Output_S [6:0] 0001100 Reversed LDO2 output voltage regulation (default by OTP) 0000000 – 0.8V, 25mV per step 0000001 – 0.825V -- 0010000 – 1.2V -- 0011100 – 1.5V. -- 1100101 – 3.3V 1111110 – 3.3V 1111111 –Full On Name Function Addr Reset LDO3 Control LDO3 Output 0x4A 0x28 Normal Control Bit Mode Name Reset Value Description 7 R/W Reversed 0 Reversed LDO3 output voltage regulation (default by OTP) 0000000 – 0.8V, 25mV per step 0000001 – 0.825V -- 0010000 – 1.2V -- 0011100 – 1.5V. -- 1100101 – 3.3V 1111110 – 3.3V 1111111 – Full On [6:0] R/W LDO3 Output_N [6:0] 0101000

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RT5037

LDO3 Control Standby Bit Mode 7 R/W LDO3 Output Control Reversed Preliminary

Reset Name Function Addr 0x7A 0x28 Description Name Reset Value 0 LDO3 Output_S [6:0] R/W [6:0] 0101000 Reversed LDO3 output voltage regulation (default by OTP) 0000000 – 0.8V, 25mV per step 0000001 – 0.825V -- 0010000 – 1.2V -- 0011100 – 1.5V. -- 1100101 – 3.3V 1111110 – 3.3V 1111111 – Full On Name Function Addr Reset LDO4 Control LDO4 Output 0x4B 0x28 Normal Control Bit Mode Name Reset Value Description 7 R/W Reversed 0 Reversed LDO4 output voltage regulation (default by OTP) 0000000 – 0.8V, 25mV per step 0000001 – 0.825V -- 0010000 – 1.2V -- 0011100 – 1.5V. -- 1100101 – 3.3V 1111110 – 3.3V 1111111 – Full On Reset [6:0] R/W LDO4 Output_N[6:0] 0101000 LDO4 Control Standby Bit Mode 7 R/W LDO4 Output Control Reversed Name Function Addr 0x7B 0x28 Description Name Reset Value 0 [6:0] R/W LDO4 Output_S[6:0] 0101000 Reversed LDO4 output voltage regulation (default by OTP) 0000000 – 0.8V, 25mV per step 0000001 – 0.825V -- 0010000 – 1.2V -- 0011100 – 1.5V. -- 1100101 – 3.3V 1111110 – 3.3V 1111111 –Full On

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DS5037-P00_RK August 2014

Preliminary

Name Function Addr LDO VRC Control Normal LDO VRC Control Name 0x4C Reset Value RT5037

Reset Option Description Bit Mode VRC Setting [7:6] R/W LDO1 VRC_N[1:0] 00 00 – 25mV/10s, 01 – 50mV/10s, 10 – 75mV/10s, 11 – 100mV/10s, VRC Setting [5:4] R/W LDO2 VRC_N[1:0] 00 00 – 25mV/10s, 01 – 50mV/10s, 10 – 75mV/10s, 11 – 100mV/10s, VRC Setting [3:2] R/W LDO3 VRC_N[1:0] 00 00 – 25mV/10s, 01 – 50mV/10s, 10 – 75mV/10s, 11 – 100mV/10s, VRC Setting [1:0] R/W LDO4 VRC_N[1:0] 00 00 – 25mV/10s, 01 – 50mV/10s, 10 – 75mV/10s, 11 – 100mV/10s,

Name Function Addr LDO VRC Control Standby LDO VRC Control Name 0x7C Reset Value Reset Option Description Bit Mode VRC Setting [7:6] R/W LDO1 VRC_S[1:0] 00 00 – 25mV/10s, 01 – 50mV/10s, 10 – 75mV/10s, 11 – 100mV/10s, VRC Setting [5:4] R/W LDO2 VRC_S[1:0] 00 00 – 25mV/10s, 01 – 50mV/10s, 10 – 75mV/10s, 11 – 100mV/10s, VRC Setting [3:2] R/W LDO3 VRC_S[1:0] 00 00 – 25mV/10s, 01 – 50mV/10s, 10 – 75mV/10s, 11 – 100mV/10s, VRC Setting [1:0] R/W LDO4 VRC_S[1:0] 00 00 – 25mV/10s, 01 – 50mV/10s, 10 – 75mV/10s, 11 – 100mV/10s,

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RT5037

LDO VRC Enable Normal LDO VRC Enable Name Preliminary

Reset 0x00 Description Name Function Addr 0x4D Reset Value Bit Mode LDO1 VRC 0 – Disable – voltage ramps up to target voltage with 7 R/W LDO1VRC_EN_N 0 one time 1 – Enable – voltage ramps up to target voltage with slope control LDO2 VRC 0 – Disable – voltage ramps up to target voltage with 6 R/W LDO2VRC_EN_N 0 one time 1 – Enable – voltage ramps up to target voltage with slope control LDO3 VRC 0 – Disable – voltage ramps up to target voltage with 5 R/W LDO3VRC_EN_N 0 one time 1 – Enable – voltage ramps up to target voltage with slope control LDO4 VRC 0 – Disable – voltage ramps up to target voltage with 4 R/W LDO4VRC_EN_N 0 one time 1 – Enable – voltage ramps up to target voltage with slope control [3:0] R/W

Name Function Addr LDO VRC Enable Standby LDO VRC Enable Name 0x7D Reset Value Reset 0x00 Description Reserved 0000 Reserved Bit Mode LDO1 VRC 0 – Disable – voltage ramps up to target voltage with 7 R/W LDO1VRC_EN_S 0 one time 1 – Enable – voltage ramps up to target voltage with slope control LDO2 VRC 0 – Disable – voltage ramps up to target voltage with 6 R/W LDO2VRC_EN_S 0 one time 1 – Enable – voltage ramps up to target voltage with slope control LDO3 VRC 0 – Disable – voltage ramps up to target voltage with 5 R/W LDO3VRC_EN_S 0 one time 1 – Enable – voltage ramps up to target voltage with slope control

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Preliminary

Bit Mode Name Reset Value Description RT5037

LDO4 VRC 0 – Disable – voltage ramps up to target voltage with one 4 R/W LDO4VRC_EN_S 0 time 1 – Enable – voltage ramps up to target voltage with slope control [3:0] R/W Name Function Addr LDOs/LSW Mode Reset LDOs/LSW Off 0x4E 0XF3 Mode Bit Mode Name Reset Value Description 7 R/W LDO1oms LDO1 output off mode state 1 0 – Floating 1 – Ground-discharged LDO2 output off mode state 1 0 – Floating 1 – Ground-discharged LDO3 output off mode state 1 0 – Floating 1 – Ground-discharged LDO4 output off mode state 1 0 – Floating 1 – Ground-discharged 00 Reserved LSW2 output off mode state 1 0 – Floating 1 – Ground-discharged LSW1 output off mode state 1 0 – Floating 1 – Ground-discharged Reset Reserved 0000 Reserved 6 R/W LDO2oms 5 R/W LDO3oms 4 R/W LDO4oms [3:2] R/W Reserved 1 R/W LSW2oms 0 R/W LSW1oms Name Function Addr Bucks/LDOs On/Off Normal Bit Mode Bucks/LDOs On/Off 0x4F Option Description Name Reset Value 7 R/W LDO1_EN_N 6 R/W LDO2_EN_N 5 R/W LDO3_EN_N

LDO1 Enable Control Bit. 0 0 – OFF 1 – ON LDO2 Enable Control Bit. 0 0 – OFF 1 – ON LDO3 Enable Control Bit. 0 0 – OFF 1 – ON Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.©

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RT5037

Bit Mode Preliminary

Name Reset Value Description LDO4 Enable Control Bit. 4 R/W LDO4_EN_N 0 0 – OFF 1 – ON Buck1 Enable Control Bit. 3 R/W Buck1_EN_N 0 0 – OFF 1 – ON Buck2 Enable Control Bit. 2 R/W Buck2_EN_N 0 0 – OFF 1 – ON Buck3 Enable Control Bit. 1 R/W Buck3_EN_N 0 0 – OFF 1 – ON Buck4 Enable Control Bit. 0 R/W Buck4_EN_N 0 0 – OFF 1 – ON Name Function Addr Reset

Bucks/LDOs On/Off Standby Bucks/LDOs On/Off standby 0x7F Option Bit Mode Name Reset Value Description LDO1 Enable Control Bit. 7 R/W LDO1_EN_S 0 0 – OFF 1 – ON LDO2 Enable Control Bit. 6 R/W LDO2_EN_S 0 0 – OFF 1 – ON LDO3 Enable Control Bit. 5 R/W LDO3_EN_S 0 0 – OFF 1 – ON LDO4 Enable Control Bit. 4 R/W LDO4_EN_S 0 0 – OFF 1 – ON Buck1 Enable Control Bit. 3 R/W Buck1_EN_S 0 0 – OFF 1 – ON Buck2 Enable Control Bit. 2 R/W Buck2_EN_S 0 0 – OFF 1 – ON Buck3 Enable Control Bit. 1 R/W Buck3_EN_S 0 0 – OFF 1 – ON Buck4 Enable Control Bit. 0 R/W Buck4_EN_S 0 0 – OFF 1 – ON

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Preliminary

Name Function Addr LSWs On/Off Bit Mode LSWs On/Off Name 0x50 Reset Value RT5037

Reset 0x00 Description 7 R/W WK_CTRL Wake-up Control 0 –Adapter Plug-in or RTC Count Down to 0 or PWRON 0 Reboot can’t wake-up from standby mode 1 – Adapter Plug-in or RTC Count Down to 0 or PWRON Reboot can wake-up from standby mode 000 Reserved LSW2 Enable Control Bit. Standby 0 0 – OFF 1 – ON LSW1 Enable Control Bit. Standby 0 0 – OFF 1 – ON LSW2 Enable Control Bit. Normal 0 0 – OFF 1 – ON LSW1 Enable Control Bit. Normal 0 0 – OFF 1 – ON Reset [6:4] R/W Reserved 3 R/W LSW2_EN_S 2 R/W LSW1_EN_S 1 R/W LSW2_EN_N 0 R/W LSW1_EN_N

Name Function Addr REBOOT/StandBy REBOOT/StandBy Ctrl Ctrl Bit Mode [7:6] R/W Name 0x51 0xA0 Reset Value Description Delay2[1:0] [5:4] R/W Delay1[1:0] [3:2] R/W RESET Action Delay2 setting00 : 100ms 01 : 500ms 10 10 : 1s 11 : 2s Delay1 setting 00 : 100ms 10 01 : 500ms 10 : 1s 11 : 2s 00 : Reset BUCK1 to BUCK4 and LDO1 to LDO4 output level to default 10 01 : delay1 power-off PMIC 10 : delay1 power-off then delay2 power-on PMIC 11 : reserved 00 Reserved [1:0] R/W

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RT5037

PWRON/RESETB Time Setting Bit Mode [7:6] R/W PWRON/RESETB Time Setting Name Reserved Preliminary

Reset Name Function Addr 0x52 0X16 Reset Value 00 Reserved Description Long-press time setting (after Power-On) 00 : 1s 01 : 1.5s 10 : 2s 11 : 2.5s [5:4] R/W L_PRESS_TIME[1:0] 01 Sending short/long-press IRQ to CPU Ex : 1.5s = low time < 1.5s (short IRQ) = low time > 1.5s but < 6s (shutdown time) (long IRQ) = low time > 6s (shutdown time) (shutdown) Key-press forced shutdown time setting 00 : 4s (pressing time-low level) [3:2] R/W SHDN_PRESS 01 01 : 6s 10 : 8s 11 : 10s RESETB signal delay after the last power startup is done 00 : 100ms [1:0] R/W RESETB_DLY Option 01 : 200ms 10 : 400ms 11 : 800ms

Name Function Addr SHDN/standby Control Bit Mode Shutdown/standby Control Name Reset 0x53 0X48 Reset Value Description 7 R/W SHDN_CTRL Power Off is set by CPU. 100ms delay to power off after setting. 0 0 : Normal operation 1 : Disable the PMIC output Disable Buck/LDO only for normal power off (SHDN_CTRL = 1) 1 0 : disable at the same time 1 : contrary to the startup timing (first_on-last_off) Shutdown delay time after send the PWRON key-press-forced-shutdown IRQ (when IRQ is disable, there is no delay) 00 00: 0ms (default) 01 : 100ms 10 : 500ms 11 : 1s 6 R/W SHDN_TIMING [5:4] R/W SHDN_DLYTIME

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Preliminary

Bit Mode Name Reset Value 1 RT5037

Description 3 R/W STANDBY_OFF [2:1] R/W StandBy_EN [1:0] 0 R/W STB_Trigger Standby off control (0 : off at the same time, 1 : off sequentially) Standby En/Disable and each power re-startup interval time 00 : standby mode disable 00 01 : enable and 1ms 10 : enable and 2ms 11 : enable and 4ms 0 : normal operation 1 : Standby Mode control. From low to high will 0 trigger standby mode and from high to low will leave standby mode. Reset

Name Function Addr SHDN Off Enable Setting1 Bit Mode SHDN Off Enable Setting1 Name 0x 0X00 Reset Value 0 Description 7 R/W BCK1LV_ENSHDN 6 R/W BCK2LV_ENSHDN 0 5 R/W BCK3LV_ENSHDN 0 4 R/W BCK4LV_ENSHDN 0 3 R/W LDO1LV_ENSHDN 0 2 R/W LDO2LV_ENSHDN 0 1 R/W LDO3LV_ENSHDN 0 0 R/W LDO4LV_ENSHDN

0 Buck1 output voltage low SHDN 0 : disable this event. 1 : enable this event. Buck2 output voltage low SHDN 0 : disable this event. 1 : enable this event. Buck3 output voltage low SHDN 0 : disable this event. 1 : enable this event. Buck3 output voltage low SHDN 0 : disable this event. 1 : enable this event. LDO1 output voltage low SHDN 0 : disable this event. 1 : enable this event. LDO2 output voltage low SHDN 0 : disable this event. 1 : enable this event. LDO3 output voltage low SHDN 0 : disable this event. 1 : enable this event. LDO4 output voltage low SHDN 0 : disable this event. 1 : enable this event. Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.©

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RT5037

SHDN Off Enable Setting2 SHDN Off Enable Setting2 Preliminary

Reset Name Function Addr 0x55 0X06 Reset Value Description LSW2 output voltage low SHDN 7 R/W LSW2LV_ENSHDN 0 0 : disable this event. 1 : enable this event. LSW1 output voltage low SHDN 6 R/W LSW1LV_ENSHDN 0 0 : disable this event. 1 : enable this event. VSYS low SHDN 5 R/W VSYSLV_ENSHDN 0 0 : disable this event. 1 : enable this event. [4:3] R/W Reserved 00 Reserved PWRON key-pressed forced SHDN 2 R/W PWRON_ENSHDN 1 0 : disable this event. 1 : enable this event. Over temperature SHDN 1 R/W OT_ENSHDN 1 0 : disable this event. 1 : enable this event. VDDA voltage low SHDN 0 R/W VDDALV_ENSHDN 0 0 : disable this event. 1 : enable this event.

Name Function Addr OFF/ON Event Bit Mode OFF/ON Event Name 0x56 Reset 0XF0 Bit Mode Name [7:4] R Reset Value Description Powered off because of (Only shows last power-off event) 0000 : VDDA voltage low (VOFF) (Set by reg) 0001 : Buck1 output voltage low 0010 : Buck2 output voltage low 0011 : Buck3 output voltage low 0100 : Buck4 output voltage low 0101 : PWRON key-pressed forced shutdown 0110 : Power Off register setting OFF_Event 1111 0111 : Over temperature event 1000 : from RESETB pin event or PMIC booting unsuccessfully 1001: LDO1 output voltage low 1010: LDO2 output voltage low 1011: LDO3 output voltage low 1100: LDO4 output voltage low 1101: LSW2 output voltage low 1110: LSW1 output voltage low 1111 : SYSLV

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Preliminary

Bit Mode Name Reset Value 0 Reserved RT5037

Description 3 R Reserved Show Standby Status : 2 R Standby Status 0 0 : PMIC is not in standby mode 1: PMIC is in standby mode Powered on because of (Only shows last power-on event) 00 : VIN Plug-in 00 01 : PWRON key 10 : RESET Delay1 OFF then Delay2 Power-on 11 : Reserved Reset 0X00 Description [1:0] R ON_Event

Name Function Addr Bucks/LDOs_IRQ Bucks/LDOs_IRQ Bit Mode 7 6 5 4 3 2 1 0

Name Function Addr LSWs/BASE_IRQ LSWs/BASE_IRQ Bit Mode 7 6 R R Name LSW2LV_IRQ LSW1LV_IRQ 0x58 Reset 0X00 Description R R R R R R R R Name BCK1LV_IRQ BCK2LV_IRQ BCK3LV_IRQ BCK4LV_IRQ LDO1LV_IRQ LDO2LV_IRQ LDO3LV_IRQ LDO4LV_IRQ 0x57 Reset Value 0 0 0 0 0 0 0 0 Buck1 output voltage is lower than 66%, IRQ indicator. Buck2 output voltage is lower than 66%, IRQ indicator. Buck3 output voltage is lower than 66%, IRQ indicator. Buck4 output voltage is lower than 66%, IRQ indicator. LDO1 output voltage is lower than 50%, IRQ indicator. LDO2 output voltage is lower than 50%, IRQ indicator. LDO3 output voltage is lower than 50%, IRQ indicator. LDO4 output voltage is lower than 50%, IRQ indicator. Reset Value 0 0 LSW2 output voltage is lower than 66%, IRQ indicator. LSW1 output voltage is lower than 66%, IRQ indicator. PMIC VSYS voltage is lower than SYSLV setting, IRQ 5 R PMICSYSLV_IRQ 0 indicator. [4:2] R 1 R 0

R Reversed OT_IRQ 000 Reversed Charger thermal shutdown fault. Set when the die temperature exceeds thermal shutdown threshold or 0 PMIC Internal over-temperature was triggered, IRQ indicator. 0 VDDA voltage is lower VDDAUVLO, IRQ indicator. VDDALV_IRQ Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.©

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RT5037

POWER_KEY_IRQ POWER_KEY_IRQ Bit Mode 7 6 5 R R R Name KPSHDN_IRQ PWRONR_IRQ PWRONF_IRQ Preliminary

Reset 0X00 Description PWRON Key-press forced shutdown, IRQ indicator. PWRON Key-press rising edge, IRQ indicator. PWRON Key-press falling edge, IRQ indicator. Name Function Addr 0x59 0 0 0 Reset Value PWRON key short press, IRQ enable (32μs deglitch 4 R PWRONSP_IRQ 0 time) PWRON key long press, IRQ enable (32μs deglitch 3 R PWRONLP_IRQ 0 time) [2:0] R

Name Function Addr Bucks/LDOs _IRQ_Mask Bit Mode Bucks/LDOs _IRQ_Mask Name Reset Reversed 000 Reversed 0x5A 0XFF Reset Value Description 7 R/W BCK1LVM Buck1 low voltage protection interrupt mask. 1 0 – Interrupt is not masked. 1 – Interrupt is masked. Buck2 low voltage protection interrupt mask. 1 0 – Interrupt is not masked. 1 – Interrupt is masked. Buck3 low voltage protection interrupt mask. 1 0 – Interrupt is not masked. 1 – Interrupt is masked. Buck4 low voltage protection interrupt mask. 1 0 – Interrupt is not masked. 1 – Interrupt is masked. LDO1 low voltage protection interrupt mask. 1 0 – Interrupt is not masked. 1 – Interrupt is masked. LDO2 low voltage protection interrupt mask. 1 0 – Interrupt is not masked. 1 – Interrupt is masked. LDO3 low voltage protection interrupt mask. 1 0 – Interrupt is not masked. 1 – Interrupt is masked. LDO4 low voltage protection interrupt mask. 1 0 – Interrupt is not masked. 1 – Interrupt is masked. 6 R/W BCK2LVM 5 R/W BCK3LVM 4 R/W BCK4LVM 3 R/W LDO1LVM 2 R/W LDO2LVM 1 R/W LDO3LVM 0 R/W LDO4LVM

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DS5037-P00_RK August 2014

Preliminary

Name Function Addr LSWs/BASE _IRQ_Mask Bucks/LDOs _IRQ_Mask RT5037

Reset 0x5B 0XE0 Description Bit Mode Name Reset Value 7 R/W LSW2LVM LSW2 low voltage protection interrupt mask. 1 0 – Interrupt is not masked. 1 – Interrupt is masked. LSW1 low voltage protection interrupt mask. 1 0 – Interrupt is not masked. 1 – Interrupt is masked. 6 R/W LSW1LVM PMIC VSYS low voltage protection interrupt mask. 5 R/W PMICSYSLVM 1 0 – Interrupt is not masked. 1 – Interrupt is masked. [4:2] R/W Reversed 000 Reversed Over Temperature protection interrupt mask. 0 0 – Interrupt is not masked. 1 – Interrupt is masked. VDDA low voltage protection interrupt mask. 0 0 – Interrupt is not masked. 1 – Interrupt is masked. 1 R/W OTM 0 R/W VDDALVM

Name Function Addr POWER_KEY _IRQ_Mask POWER_KEY _IRQ_Mask Reset 0x5C 0X78 Description Bit Mode Name Reset Value 0 KPSHDN 7 R/W _IRQM PWRONR 6 R/W _IRQM PWRONF 5 R/W _IRQM PWRONSP 4 R/W _IRQM PWRONLP 3 R/W _IRQM [2:0] R/W Reversed

PWRON Key-press forced shutdown interrupt mask. 0 – Interrupt is not masked. 1 – Interrupt is masked. PWRON Key-press rising edge, IRQ interrupt mask. 0 – Interrupt is not masked. 1 – Interrupt is masked. PWRON Key-press falling edge, IRQ interrupt mask. 0 – Interrupt is not masked. 1 – Interrupt is masked. PWRON key short press, IRQ interrupt mask. 0 – Interrupt is not masked. 1 – Interrupt is masked. PWRON key long press, IRQ interrupt mask. 0 – Interrupt is not masked. 1 – Interrupt is masked. 1 1 1 1 000 Reversed Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.©

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RT5037

Buck Syn-Clock Buck Syn-Clock Syn-Clock Frequency Syn-Clock Frequency Control Control Bit Mode Preliminary

Reset Name Function Addr 0x65 0x40 Name Reset Value Description VSYS UVLO 2.8~3.5V per 0.1V (Falling threshold with hysteresis of 300mV) 000 – 2.8V 001 – 2.9V 010 – 3.0V (default) [7:5] R/W VSYSUVLO[2:0] 010 011 – 3.1V 100 – 3.2V 101 – 3.3V 110 – 3.4V 110 – 3.5V [4:1] R/W Reversed 0000 Reversed 0 R/W 1.5/3.0MHz

Name Function Addr LSW2 control Normal LSW2 Output Control Bit Mode 7 R/W Reversed 0x80 0 Name Reset Value Reset 0x58 Description Select Buck Syn-Clock Syn-Clock Frequency 0 0:1.5MHz 1:30MHz Reversed LSW2 output voltage regulation (default by OTP) 0000000 – 0.8V, 25mV per step 0000001 – 0.825V -- 0010000 – 1.2V [6:0] R/W LSW2 Output_N[6:0] 1011000 -- 0011100 – 1.5V. -- 1100101 – 3.3V 1111110 – 3.3V 1111111 – Full On

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Preliminary

Name Function Addr LSW2 control Standby Bit Mode 7 R/W LSW2 Output Control Reversed RT5037

Reset 0x82 0x58 Description Name Reset Value 0 Reversed LSW2 output voltage regulation (default by OTP) 0000000 – 0.8V, 25mV per step 0000001 – 0.825V -- 0010000 – 1.2V [6:0] R/W LSW2 Output_S [6:0] 1011000 -- 0011100 – 1.5V. -- 1100101 – 3.3V 1111110 – 3.3V 1111111 – Full On Name Function Addr LSW1 control Normal Reset LSW1 Output 0x81 0x50 Control Bit Mode Name Reset Value Description 7 R/W Reversed 0 Reversed LSW1 output voltage regulation (default by OTP) 0000000 – 0.8V, 25mV per step 0000001 – 0.825V -- 0010000 – 1.2V [6:0] R/W LSW1 Output_N[6:0] 1010000 -- 0011100 – 1.5V. -- 1100101 – 3.3V 1111110 – 3.3V 1111111 – Full On Name Function Addr LSW1 control Standby LSW1 Output Control Bit Mode 7 R/W Reversed 0x83 0 Reversed LSW1 output voltage regulation (default by OTP) 0000000 – 0.8V, 25mV per step 0000001 – 0.825V -- 0010000 – 1.2V -- 0011100 – 1.5V. -- 1100101 – 3.3V 1111110 – 3.3V 1111111 – Full On Name Reset Value Reset 0x7F Description [6:0] R/W LSW1 Output_S [6:0] 1111111

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RT5037

LSW VRC Control LSW VRC Control Bit Mode Name Preliminary

Reset Option Description Name Function Addr 0x84 Reset Value VRC Setting [7:6] R/W LSW2 VRC_N[1:0] 00 00 – 25mV/10s, 01 – 50mV/10s, 10 – 75mV/10s, 11 – 100mV/10s, VRC Setting [5:4] R/W LSW1 VRC_N[1:0] 00 00 – 25mV/10s, 01 – 50mV/10s, 10 – 75mV/10s, 11 – 100mV/10s, VRC Setting [3:2] R/W LSW2 VRC_S[1:0] 00 00 – 25mV/10s, 01 – 50mV/10s, 10 – 75mV/10s, 11 – 100mV/10s, VRC Setting [1:0] R/W LSW1 VRC_S[1:0] 00 00 – 25mV/10s, 01 – 50mV/10s, 10 – 75mV/10s, 11 – 100mV/10s,

Name Function Addr LSW VRC Enable LSW VRC Enable Bit Mode Name 0x85 Reset Value Reset 0x00 Description LSW2 VRC in Normal Mode 0 – disable – voltage ramps up to target voltage with 7 R/W LSW2VRC_EN_N 0 one time 1 – enable – voltage ramps up to target voltage with slope control LSW1 VRC in Normal Mode 0 – disable – voltage ramps up to target voltage with 6 R/W LSW1VRC_EN_N 0 one time 1 – enable – voltage ramps up to target voltage with slope control [5:4] R/W Reserved 00 Reserved LSW2 VRC in Standby Mode 0 – disable – voltage ramps up to target voltage with 3 R/W LSW2VRC_EN_S 0 one time 1 – enable – voltage ramps up to target voltage with slope control LSW1 VRC in Standby Mode 0 – disable – voltage ramps up to target voltage with 2 R/W LSW1VRC_EN_S 0 one time 1 – enable – voltage ramps up to target voltage with slope control [1:0] R/W

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Name Function Addr RTCADJ RTC Frequency Adjust Name RT5037

Reset 0x90 0XBC Bit Mode Reset Value Description Enable RTC 7 R/W RTC_EN 1 0 – RTC disabled 1 – RTC enabled finely tune the RTC time counting [6:0] R/W RTCADJ[6:0] 0111100 Frequency by adjusting (RTCAJ -?60)/2 ppm. Hence, the tuning range is -30ppm to 33ppm.

Name Function Addr RTCT_SEC RTC Timing_SEC 0x91 Bit Mode 7 R Name BUSY Reset Value 0 Reset 0X00 Description 1 : RTC is busy, and the writing access is not allowed 0 Reversed Stores the SECOND field of RTC time. That is 0 to [5:0] R/W RTCT_SEC[5:0] 00000 59.

Name Function Addr RTCT_MINUTE RTC Timing_MINUTE Name Reversed RTCT_MIN[5:0] Reset 6 R Reversed 0x92 0X00 Reset Value 00 Reversed 00000 Stores the MINUTE field of RTC time. That is 0 to 59. Description Bit Mode [7:6] R/W [5:0]

R/W Name Function Addr RTCT_HOUR RTC Timing_HOUR 0x93 Bit Mode Name Reset 0X00 Reset Value Description 12hours/24hours selection. 7 R/W 12/24hours 0 0 – 24hours. 1 – 12 hours. AM/PM selection. 0 – AM 6 R/W AM/PM 0 1 –PM If the 24hours is selected, user can't set this bit. 5 R/W Reversed 0 Stores the HOUR field of RTC time. That is 0 to 23 [4:0] R/W RTCT_HOUR[4:0] 00000 (24hour format).

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RT5037

Preliminary

Reset 0X0D Description Name Function Addr RTCT_YEAR RTC YEAR 0x94 Bit Mode [7:6] R/W Name Reversed Reset Value 00 Reversed Stores the YEAR field of RTC time. That is 0 to 63. [5:0] R/W RTCT_ YEAR [5:0] 0001101 RTCT_ YEAR [5:0] = 0 means 2000.

Name Function Addr RTCT_MONTH RTCT_MONTH Bit Mode [7:4] R/W Name Reversed 0x95 0000 Reversed Reset Value Reset 0X01 Description Stores the MONTH field of RTC time. That is 1 to 12. [3:0] R/W RTCT_MON[3:0] 0001 RTCT_MON = 1 means January.

Name Function Addr RTC DATE/WEEK RTC DATE/WEEK Name 0x96 Reset Value Bit Mode Reset 0X41 Description Stores the DAY-of-WEEK field of RTC time. That is 0 to 6. RTCT_WEK = 0 means Sunday. [7:5] R/W RTCT_WEEK[2:0] 010 RTCT_WEK = 1 means Monday. RT5037 cannot calculate automatically the field based on other fields. (YEAR, MONTH,DATE). [4:0]

Name Function Addr STB Mode_Setting Standby(STB) Mode Setting Name Reversed Reset R/W RTCT_DAY[4:0] 00001 Stores the DATE field of RTC time. That is 1 to 31. 0x97 0X00 Reset Value Description Bit Mode [7:1] R/W 0000000 Reversed STB_CTRL = 0 means count down (CD) mode. 0 R/W STB_CTRL 0 STB_CTRL = 1 means clock alarm (Alarm) mode. Name Function Addr Reset 0X00 Description

STB_Alarm_SEC STB_Alarm_SEC Bit Mode [7:6] R/W [5:0] R/W

Name Reversed STB_Alarm_ SEC[5:0] 0x98 Reset Value 00 Reversed 00000 Stores the SECOND field of standby alarm time. That is 0 to 59. Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.©

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Name Function Addr STB_Alarm _MINUTE [7:6] R/W STB_Alarm_MINUTE 0x99 Name Reversed Reset Value RT5037

Reset 0X00 Description Bit Mode 00 Reversed Stores the MINUTE field of standby alarm [5:0] R/W STB_Alarm_MIN[5:0] 00000 time. That is 0 to 59.

Name Function Addr STB_Alarm_HOUR STB_Alarm_HOUR Bit Mode Name 0x9A Reset 0X00 Reset Value Description 12hours/24hours selection. 7 R/W STB_Alarm_12/24hours 0 0 – 24hours. 1 – 12 hours. AM/PM selection. 0 – AM 6 R/W STB_Alarm_AM/PM 0 1 –PM If the 24hours is selected, user can't set this bit. 5 R/W Reversed 0 Reversed. Stores the HOUR field of standby alarm time. [4:0] R/W STB_Alarm_HOUR[4:0] 0000 That is 0 to 23 (24hour format).

Name Function Addr STB_Alarm_YEAR STB_Alarm_ YEAR Bit Mode [7:6] R/W Name Reversed 0x9B Reset Value 00 Reversed Reset 0X0D Description Stores the YEAR field of standby alarm time. That is 0 to 63. STB_Alarm_YEAR = 0 means the year 2000. [5:0] R/W STB_Alarm_YEAR[5:0] 001101 Hence, RT5037 can setting maximum year is 2063.

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RT5037

STB_Alarm_MONTH STB_Alarm_MONTH Bit Mode [7:4] R/W Name Reversed Preliminary

Reset 0X01 Description Name Function Addr 0x9C Reset Value 0000 Reversed Stores the MONTH field of standby alarm time. [3:0] R/W STB_Alarm_MON[3:0] 0001 That is 1 to 12. STB_Alarm_MON = 1 means January.

Name Function Addr STB_Alarm_DAY STB_Alarm_ DAY 0x9D Bit Mode [7:5] R Name Reset Value 00 Reversed Reversed Reset 0X01 Description Stores the DATE field of standby alarm time. That is 1 to 31, depending on the month. [4:0] R/W STB_Alarm_DAY[4:0] 0001 STB_Alarm_DAY [4:0] = 1 means 1st day of each month. RT5037 supports leap year counting.

Name Function Addr STB_CD_SEC STB_CD_SEC 0x9E Bit Mode [7:6] R/W Name Reversed Reset Value 00 Reversed Reset 0X00 Description Stores the SECOND field of standby count down [5:0] R/W STB_CD_SEC[5:0] 00000 time. That is 0 to 59.

Name Function Addr STB_CD_MINUTE STB_CD_MINUTE Bit Mode [7:6] R/W Name Reversed 0x9F 00 Reversed Reset Value Reset 0X00 Description Stores the MINUTE field of standby count down [5:0] R/W STB_CD_MIN[5:0] 00000 time. That is 0 to 59.

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Name Function Addr STB_CD_HOUR STB_CD_HOUR Bit Mode Name 0xA0 RT5037

Reset 0X00 Reset Value Description 12hours/24hours selection. 7 R/W STB_CD_12/24hours 0 0 – 24hours. 1 – 12 hours. AM/PM selection. 0 – AM 6 R/W STB_CD_AM/PM 0 1 –PM If the 24hours is selected, user can't set this bit. 5 R/W Reversed 0 Reversed Stores the HOUR field of standby count down time. That is 0 to 23 (24hour format). Reset 0X00 Description [4:0] R/W STB_CD_HOUR[4:0] 0000

Name Function Addr STB_CD_DATE_L STB_CD_DATE_L Bit Mode [7:0]

Name Function Addr STB_CD_DAY_H STB_CD_DAY_H Bit Mode [7:4] R/W Name Reversed 0xA2 0000 Reversed Reset Value R/W Name 0xA1 Reset Value 00000000 STB_CD_DAY[7:0] The low byte of day down counter Reset 0X00 Description [3:0] R/W STB_CD_ DAY [11:8] 0000 The high byte of day down counter

Name Function Addr STB_WKUP_IRQ Bit Mode [7:2] R 1 R 0 R

Standby WakeUp_IRQ Name Reversed CD_IRQ CA_IRQ Reset 0xA4 0X00 Reset Value 000000 Reversed Standby mode wakes up by count down (CD) IRQ 0 indicator. Standby mode wakes up by clock alarm (CA) IRQ 0 indicator. Description Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.©

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RT5037

STB_WKUP_Mask Standby WakeUp _IRQ _Mask Name Reversed CDM Preliminary

Reset Name Function Addr 0xA5 0X03 Reset Value 000000 Reversed Standby mode wakes up by count down interrupt mask. 1 0 – interrupt is not masked. 1 – Interrupt is masked. Standby mode wakes up by clock alarm interrupt mask. 1 0 – interrupt is not masked. 1 – Interrupt is masked. Description Bit Mode [7:2] R/W 1 R/W 0 R/W

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Preliminary

Thermal Considerations

For continuous operation, do not exceed absolutemaximum junction temperature. The maximum powerdissipation depends on the thermal resistance of the ICpackage, PCB layout, rate of surrounding airflow, anddifference between junction and ambient temperature. Themaximum power dissipation can be calculated by thefollowing formula :PD(MAX) = (TJ(MAX) − TA) / θJA

where TJ(MAX) is the maximum junction temperature, TA isthe ambient temperature, and θJA is the junction to ambientthermal resistance.

For recommended operating condition specifications, themaximum junction temperature is 125°C. The junction toambient thermal resistance, θJA, is layout dependent. ForWQFN-40L 5x5 package, the thermal resistance, θJA, is27.5°C/W on a standard JEDEC 51-7 four-layer thermaltest board. The maximum power dissipation at TA = 25°Ccan be calculated by the following formula :

PD(MAX) = (125°C − 25°C) / (27.5°C/W) = 3.63W forWQFN-40L 5x5 package

The maximum power dissipation depends on the operatingambient temperature for fixed TJ(MAX) and thermalresistance, θJA. The derating curve in Figure 3 allows thedesigner to see the effect of rising ambient temperatureon the maximum power dissipation.

4.0

RT5037

Layout Considerations

Some PCB layout guidelines for optimal performance ofRT5037 list as following. Following figure shows the realPCB layout considerations and it is based on the realcomponent size whose unit is millimeter (mm).



Place the input and output capacitors as close to theinput and output pins as possible.



Keep the main power traces as wide and short aspossible.

The output inductor and bootstrap capacitor should beplaced close to the chip and LXCHG pins.

The battery voltage sensing point should be placed afterthe output capacitor, and kept wide for maximum pre-charge current.

To optimize current sense accuracy, connect the tracesto RSENSE with Kelvin sense connection.

Put the input capacitor as close as possible to the devicepins.

LXB1 to LXB4 node is with high frequency voltage swingand should be kept small area. Keep analog componentsaway from LXB1 to LXB4 node to prevent stray capacitivenoise pick-up.

Connect VOUTSB1 to VOUTSB4 pin network behindthe output capacitors.

Connect all analog grounds to a common node and thenconnect the common node to the power ground behindthe output capacitors.



Maximum Power Dissipation (W)1 Four-Layer PCB3.53.02.52.01.51.00.50.0

100

125

Ambient Temperature (°C)

Figure 3. Derating Curve of Maximum Power Dissipation

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RT5037

Preliminary

C0805VOUT1DCDC1Inductor 4*4mmDCDC1VINCHGC1206C0805VINB1VINCHGDCDC2Inductor 4*4mmDCDC2SCLSTB_ENC0805VMIDCHGVOUTSB1XTALOUTSDAXTALINPWRONIRQCLKOUTRESET#VINCHGVMIDCHGLXCHGVBOOTCHGVDDAVBATSISENSNVINB1LXB1LXB2VINB2VINB4LXB4LXB3VINB30000C0805VINB300000000000000VSYSC1206C0805VOUT3SOT-23Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.©

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C0805VINB2C0805VINB4C0805VOUT2C0805VOUT4ChargerInductor 4*4mmISENSPPPCTRLVOUTLSW2VOUTLSW1TSVINL1VOL1VOL2VINL234VINLSWVOUTSB3VOUTSB2VOUTSB4VOL3VOL4DCDC4Inductor 4*4mmDCDC4RsenseR1632DCDC3Inductor 4*4mmDCDC3TOP

2nd LayerGND

3rd LayerGND & I/O

C0805VBATVBATBottom

Figure 4. PCB Layout Guide

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Preliminary

Outline DimensionDD2SEE DETAIL ART5037

L1EE21212eA

A3A1bDETAIL APin #1 ID and Tie Bar Mark OptionsNote : The configuration of the Pin #1 identifier is optional,but must be located within the zone indicated.Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.150 0.250 0.006 0.010 D 4.950 5.050 0.195 0.199 D2 3.250 3.500 0.128 0.138 E 4.950 5.050 0.195 0.199 E2 3.250 3.500 0.128 0.138 e 0.400 0.016 L 0.350 0.450 0.014 0.018

W-Type 40L QFN 5x5 Package

Richtek Technology Corporation

14F, No. 8, Tai Yuen 1st Street, Chupei CityHsinchu, Taiwan, R.O.C.Tel: (8863)55267

Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should

obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannotassume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to beaccurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of thirdparties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.

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