Method for converting programmable logic devices i

专利名称：Method for converting programmable logic

devices into standard cell devices

发明人：Glenn A. Baxter申请号：US09615476申请日：20000713公开号：US06490707B1公开日：20021203

专利附图：

摘要：Method and circuits to create reduced field programmable gate arrays (RFPGA)from the configuration data of field programmable gate arrays (FPGA) are disclosed. Theconfigurable elements of the FPGA are replaced with standard cell circuits that

reproduce the functionality of the configured FPGA. Specifically, reduced logic blocks arederived from the configuration data of configurable logic blocks. Similarly, reducedinput/output blocks and reduced matrices are derived from the configuration data forinput/output blocks and programmable switch matrices of the FPGA, respectively. Thereduced logic blocks are arranged in a similar layout to the original CLBs so that timingrelationships remain similar in the RFPGA and FPGA. The actual timing of the RFPGA canbe modified by increasing or decreasing the timing delay on various signal paths based onthe FPGA design or additional timing constraints. To reduce the time required to

generate RFPGAs, a database can be used to contain configurable logic block models andthe corresponding reduced logic block models. The database can be expanded as newreduced logic block models are created for configurable logic block models that werenot in the database. Similarly, a database can be used for the input/output blocks andprogrammable switch matrices of an FPGA.

申请人：XILINX, INC.

代理人：Edward S. Mao

更多信息请下载全文后查看