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GreenPhase-ShiftedFull-BridgeControllerWithSynchronousRectification
CheckforSamples:UCC28950
FEATURES
EnhancedWideRangeResonantZeroVoltageSwitching(ZVS)Capability
DirectSynchronousRectifier(SR)ControlLight-LoadEfficiencyManagementIncluding–BurstModeOperation
–DiscontinuousConductionMode(DCM),DynamicSROn/OffControlwithProgrammableThreshold
–ProgrammableAdaptiveDelay
AverageorPeakCurrentModeControlwithProgrammableSlopeCompensationandVoltageModeControl
ClosedLoopSoftStartandEnableFunctionProgrammableSwitchingFrequencyupto1MHzwithBi-DirectionalSynchronization(+/-3%)Cycle-by-CycleCurrentLimitProtectionwithHiccupModeSupport150-µAStart-UpCurrentVDDUnderVoltageLockout
WideTemperatureRange-40°Cto125°C
APPLICATIONS
•••••
Phase-ShiftedFull-BridgeConvertersServer,TelecomPowerSuppliesIndustrialPowerSystems
High-DensityPowerArchitecturesSolarInverters,andElectricVehicles
•••
DESCRIPTION
TheUCC28950enhancedphase-shiftedcontrollerbuildsuponTexasInstrument’sindustrystandardUCCx895phase-shiftedcontrollerfamilywithenhancementsthatofferbestinclassefficiencyintoday’shighperformancepowersystems.TheUCC28950implementsadvancedcontrolofthefull-bridgealongwithactivecontrolofthesynchronousrectifieroutputstage.
Theprimary-sidesignalsallowprogrammabledelaystoensureZVSoperationoverwide-loadcurrentandinputvoltagerange,whiletheloadcurrentnaturallytunesthesecondary-sidesynchronousrectifiersswitchingdelays,maximizingoverallsystemefficiency.
•
••••••
UCC28950TypicalApplication
+VS-CTCREFR1R212R3VSENSER6R4C3C2CSSENABLERABRCDREFRTVREFRSUMVREFRDCM(hi)RTMINC1R53456789UCC28950VREFEA+EA-COMPSS/ENDELABDELCDDELEFTMINGND24CVDDVDD23OUTA22OUTB21OUTC20OUTD19OUTE18OUTF17SYNC16CS15ADEL14ADELEF13RARCSRDCMRAEFVSENSEABCDEFSYNCRA(hi)UCC27324QEUCC27324QFBAVDDVDDQAQCVDDCVDDQBQDVDDDVOUT+
10RT11RSUM12DCMRAEF(hi)EF-
VoltageCurrentSenseR7Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet.
PRODUCTIONDATAinformationiscurrentasofpublicationdate.ProductsconformtospecificationsperthetermsoftheTexasInstrumentsstandardwarranty.Productionprocessingdoesnotnecessarilyincludetestingofallparameters.
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DESCRIPTION(CONT.)
TheUCC28950alsooffersmultiplelight-loadmanagementfeaturesincludingburstmodeanddynamicSRon/offcontrolwhentransitioninginandoutofDiscontinuousCurrentMode(DCM)operation,ensuringZVSoperationisextendeddowntomuchlighterloads.
Inaddition,theUCC28950includessupportforpeakcurrentalongwithvoltagemodecontrol,programmableswitchingfrequencyupto1MHzandawidesetofprotectionfeaturesincludingcycle-by-cyclecurrentlimit,UVLOandthermalshutdown.A90-degreephase-shiftedinterleavedsynchronizedoperationcanbeeasilyarrangedbetweentwoconverters.
TheUCC28950isavailableinTSSOP-24package.
ORDERINGINFORMATION
TEMPERATURERANGE,TA=
TJ
-40°Cto125°C
PACKAGE
Plastic24-pinTSSOP(PW)
TAPEANDREELQTY.
2502000
PARTNUMBERUCC28950PWUCC28950PWR
ABSOLUTEMAXIMUMRATINGS
overoperatingfree-airtemperaturerange(unlessotherwisenoted)
PARAMETER
Inputsupplyvoltagerange,VDD
(3)
(1)(2)
VALUE-0.4to20.0-0.4toVDD+0.4-0.4toVREF+
0.4-0.4to5.6
2k500
UNIT
OUTA,OUTB,OUTC,OUTD,OUTE,OUTF
InputsvoltagesonDELAB,DELCD,DELEF,SS/EN,DCM,TMIN,RT,SYNC,RSUM,EA+,EA-,COMP,CS,ADEL,ADELEFOutputvoltageonVREFESDrating,HBMESDrating,CDM
Continuoustotalpowerdissipation
Operatingvirtualjunctiontemperaturerange,TJOperatingambienttemperaturerange,TAStoragetemperature,Tstg
Leadtemperature(soldering,10sec.)(1)(2)(3)
V
Seedissipationratingtable-40to150-40to125-65to150300
°C
Stressesbeyondthoselistedunder“absolutemaximumratings”maycausepermanentdamagetothedevice.Thesearestressratingsonly,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunder“recommendedoperatingconditions”isnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability.Thesedevicesaresensitivetoelectrostaticdischarge;followproperdevicehandlingprocedures.
AllvoltagesarewithrespecttoGNDunlessotherwisenoted.Currentsarepositiveinto,negativeoutofthespecifiedterminal.SeePackagingSectionofthedatasheetforthermallimitationsandconsiderationsofpackages.
DISSIPATIONRATINGS(1)
PACKAGE
RqJC(°C/W)18.5
RqJA(°C/W)89.3
DERATINGFACTORABOVETA=
25°C11.2mW/°C
TA<25°C1.12W
POWERRATING
TA=70°C0.615W
TA=85°C0.448W
PW
(1)
ThesethermaldataaretakenatstandardJEDECtestconditionsandareusefulforthethermalperformancecomparisonofdifferentpackages.ThecoolingconditionandthermalimpedanceRqJAofpracticaldesignisspecific.
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RECOMMENDEDOPERATINGCONDITIONS
overoperatingfree-airtemperaturerange(unlessotherwisenoted)
MIN
Supplyvoltagerange,VDD
Operatingjunctiontemperaturerange
Converterswitchingfrequencysettingrange,FSW(nom)
ProgrammabledelayrangebetweenOUTA,OUTBandOUTC,OUTDsetbyresistorsDELABandDELCDandparameterKA(1)
ProgrammabledelayrangebetweenOUTA,OUTFandOUTB,OUTEsetbyresistorDELEF,andparameterKEF(1)
ProgrammableDCMrangeaspercentageofvoltageatCS(1)ProgrammableTMINrange(1)
Verifiedduringcharacterizationonly.
8-405030305%100
TYP
12
MAX
1712510001000
ns
140030%800
nsUNITV°CkHz
ELECTRICALCHARACTERISTICS(1)
VDD=12V,TA=TJ=-40°Cto125°C,CVDD=1µF,CREF=1µF,RAB=22.6kΩ,RCD=22.6kΩ,REF=13.3kΩ,RSUM=124kΩ,RMIN=88.7kΩ,RT=59kΩconnectedbetweenRTpinand5-VvoltagesupplytosetFSW=100kHz(FOSC=200kHz)(unlessotherwisenoted).AllcomponentdesignationsarefromtheTypicalApplicationDiagram.
PARAMETER
UnderVoltageLockout(UVLO)UVLO_R
Startthreshold
THUVLO_FTH
Minimumoperatingvoltageafterstart
6.756.150.53
7.36.70.6
7.97.20.75
V
TESTCONDITION
MIN
TYP
MAX
UNITS
UVLO_H
Hysteresis
YST
SupplyCurrentsIDD(off)IDDVREFISCCFSW(nom)DMAX
Startupcurrent
OperatingsupplycurrentVREFtotaloutputrangeShortcircuitcurrentTotalrange
Maximumdutycycle
RT=59kΩbetweenRTandGND;Inputpulses200kHz,D=0.5atSYNC
RT=59kΩbetweenRTand5V;-40°C≤TJ≤125°C
0≤IR≤20mA;VDD=from8Vto17VVREF=0VVDDis5.2V
1505
4.925-5392
10095%5
270105.075-2310897%
µAmAVmAKHz
VREFOutputVoltage
SwitchingFrequency(½ofinternaloscillatorfrequencyFOSC)
SynchronizationPHSYNCFSYNCTPW(1)
TotalrangeTotalrangePulsewidth
TypicalvaluesforTA=25°C
851802.2
902002.5
952202.8
°PHkHzµs
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ELECTRICALCHARACTERISTICS(1)(continued)
VDD=12V,TA=TJ=-40°Cto125°C,CVDD=1µF,CREF=1µF,RAB=22.6kΩ,RCD=22.6kΩ,REF=13.3kΩ,RSUM=124kΩ,RMIN=88.7kΩ,RT=59kΩconnectedbetweenRTpinand5-VvoltagesupplytosetFSW=100kHz(FOSC=200kHz)(unlessotherwisenoted).AllcomponentdesignationsarefromtheTypicalApplicationDiagram.
PARAMETER
ErrorAmplifierVICMVIOIBIASEAHIGHEALOWISOURCEISINKIVOLGBW
CommonmodeinputvoltagerangeOffsetvoltageInputbiascurrentHigh-leveloutputvoltageLow-leveloutputvoltageErroramplifiersourcecurrentErroramplifiersinkcurrentOpen-loopdcgainUnitygainbandwidth
(2)
TESTCONDITION
VICMrangeensuresparameters,thefunctionalityensuredfor3.6V 0.5-7-1 3.671 4.250.25 0.35-0.55.75 -3.754.61003 VmVµAVmAdBMHz (EA+)-(EA-)=500mV,IEAOUT=-0.5mA(EA+)-(EA-)=-500mV,IEAOUT=0.5mA 3.9-82.7 Cycle-by-CycleCurrentLimitVCS_LIMTCS CSpincycle-by-cyclethreshold PropagationdelayfromCStoOUTCandOUTDoutputsDischargecurrenttosetcycle-by-cyclecurrentlimitduration HiccupOFFTimethresholdDischargecurrenttosetHiccupModeOFFTimeChargecurrentShutdown/restart/resetthresholdPullupthresholdClampvoltage VSS=0V InputpulsebetweenCSandGNDfromzeroto2.5V 1.94 2100 2.06 Vns InternalHiccupModeSettingsIDSVHCCIHCC CS=2.5V,VSS=4V 153.21.90 203.62.55 254.23.2 µAVµA SoftStart/EnableISSVSS_STDVSS_PUVSS_CL(2) 200.253.34.20 250.503.74.65 300.704.34.95 VµA Verifiedduringcharacterizationonly. 4SubmitDocumentationFeedback ProductFolderLink(s):UCC28950 Copyright©2010,TexasInstrumentsIncorporated UCC28950 www.ti.com SLUSA16A–MARCH2010–REVISEDJULY2010 ELECTRICALCHARACTERISTICS(1)(continued) VDD=12V,TA=TJ=-40°Cto125°C,CVDD=1µF,CREF=1µF,RAB=22.6kΩ,RCD=22.6kΩ,REF=13.3kΩ,RSUM=124kΩ,RMIN=88.7kΩ,RT=59kΩconnectedbetweenRTpinand5-VvoltagesupplytosetFSW=100kHz(FOSC=200kHz)(unlessotherwisenoted).AllcomponentdesignationsarefromtheTypicalApplicationDiagram. PARAMETER ShortdelaytimesetaccuracybetweenOUTAandOUTBLongdelaytimesetaccuracybetweenOUTAandOUTBShortdelaytimesetaccuracybetweenOUTCandOUTDLongdelaytimesetaccuracybetweenOUTCandOUTDShortdelaytimesetaccuracybetweenfallingOUTA,OUTFLongdelaytimesetaccuracybetweenfallingOUTA,OUTFShortdelaytimesetaccuracybetweenfallingOUTB,OUTELongdelaytimesetaccuracybetweenfallingOUTB,OUTEPulsematchingbetweenOUTArise,OUTDfallandOUTBrise,OUTCfallHalfcyclematchingbetweenOUTArise,OUTBriseandOUTBrise,OUTArisePulsematchingbetweenOUTEfall,OUTEriseandOUTFfall,OUTFrisePulsematchingbetweenOUTEfall,OUTFriseandOUTFfall,OUTErise TESTCONDITION MIN TYP MAX UNITS ProgrammableDelayTimeSetAccuracyandRange(3)(4)(5)(6)(7)TABSET1TABSET2TCDSET1TCDSET2TAFSET1TAFSET2TBESET1TBESET2ΔTADBC CS=ADEL=ADELEF=1.8VCS=ADEL=ADELEF=0.2VCS=ADEL=ADELEF=1.8VCS=ADEL=ADELEF=0.2VCS=ADEL=ADELEF=0.2VCS=ADEL=ADELEF=1.8VCS=ADEL=ADELEF=0.2VCS=ADEL=ADELEF=1.8V CS=ADEL=ADELEF=1.8V,COMP=2V 32216322162219022190-50 452704527035240352400 5632556325482904829050 ns ΔTABBA CS=ADEL=ADELEF=1.8V,COMP=2V-50050 ΔTEEFF CS=ADEL=ADELEF=0.2V,COMP=2V-60060 ΔTEFFE(3)(4)(5)(6)(7) CS=ADEL=ADELEF=0.2V,COMP=2V-60060 SeeFigure3fortimingdiagramandTABSET1,TABSET2,TCDSET1,TCDSET2definitions.SeeFigure6fortimingdiagramandTAFSET1,TAFSET2,TBESET1,TBESET2definitions.PairofoutputsOUTC,OUTEandOUTD,OUTFalwaysgoinghighsimultaneously.OutputsAorBareneverallowedtogohighifbothoutputsOUTEandOUTFarehigh.Alldelaysettingsaremeasuredrelatively50%ofpulseamplitude. Copyright©2010,TexasInstrumentsIncorporatedSubmitDocumentationFeedback ProductFolderLink(s):UCC28950 5 UCC28950 SLUSA16A–MARCH2010–REVISEDJULY2010 www.ti.com ELECTRICALCHARACTERISTICS(1)(continued) VDD=12V,TA=TJ=-40°Cto125°C,CVDD=1µF,CREF=1µF,RAB=22.6kΩ,RCD=22.6kΩ,REF=13.3kΩ,RSUM=124kΩ,RMIN=88.7kΩ,RT=59kΩconnectedbetweenRTpinand5-VvoltagesupplytosetFSW=100kHz(FOSC=200kHz)(unlessotherwisenoted).AllcomponentdesignationsarefromtheTypicalApplicationDiagram. PARAMETER LightLoadEfficiencyCircuit DCMthreshold,T=25°C VDCM DCMthreshold,T=0°Cto85°C(8) DCMthreshold,T=-40°Cto125°C(8) IDCM,SRCTMINISINK/SRCTRTFRSRCRSINK DCMSourcingCurrentTotalrange Sink/Sourcepeakcurrent(8)RisetimeFalltime OutputsourceresistanceOutputsinkresistanceRisingthreshold(8)FallingthresholdHysteresis (8) Verifiedduringcharacterizationonly. (8) TESTCONDITION VDCM=0.4V,SweepCSconfirmthereareOUTEandOUTFpulses VDCM=0.4V,SweepCS,confirmthereareOUTEandOUTFpulses VDCM=0.4V,SweepCS,confirmthereareOUTEandOUTFpulsesCS 0.370.3640.3514425 0.390.3900.39205250.2 0.410.4160.4326625 µAnsA 25253530 nsΩV OUTPUTSOUTA,OUTB,OUTC,OUTD,OUTE,OUTF CLOAD=100pFCLOAD=100pFIOUT=20mAIOUT=20mA 105 97201016014020 °C THERMALSHUTDOWN 6SubmitDocumentationFeedback ProductFolderLink(s):UCC28950 Copyright©2010,TexasInstrumentsIncorporated www.ti.com ÓÉ Foxit Reader ±à¼-UCC28950°æȨËùÓÐ (C) Foxit Software Company,2005-2006½öÓÃÓÚÆÀ¹À¡£SLUSA16A–MARCH2010–REVISEDJULY2010 DEVICEINFORMATION Plastic24-pinTSSOP(PW)UCC28950123456789VREFEA+EA-COMPSS/ENDELABDELCDDELEFTMINGND24VDD23OUTA22OUTB21OUTC20OUTD19OUTE18OUTF17SYNC16CS15ADEL14ADELEF1310RT11RSUM12DCMTERMINALFUNCTIONS TERMINAL NUMBER 123456789101112131415161718192021222324 NAMEVREFEA+EA-COMPSS/ENDELABDELCDDELEFTMINRTRSUMDCMADELEFADELCSSYNCOUTFOUTEOUTDOUTCOUTBOUTAVDDGND I/OOIII/OIIIIIIIIIIII/OOOOOOOI FUNCTION 5-V,±1.5%,20-mAreferencevoltageoutput.Erroramplifiernon-invertinginput.Erroramplifierinvertinginput. ErroramplifieroutputandinputtothePWMcomparator. Soft-startprogramming,deviceenableandhiccupmodeprotectioncircuit.Dead-timedelayprogrammingbetweenOUTAandOUTB.Dead-timedelayprogrammingbetweenOUTCandOUTD. Delay-timeprogrammingbetweenOUTAtoOUTF,andOUTBtoOUTE.Minimumdutycycleprogramminginburstmode.Oscillatorfrequencyset.Masterorslavemodesetting. Slopecompensationprogramming.Voltagemodeorpeakcurrentmodesetting.DCMthresholdsetting.Delay-timeprogrammingbetweenprimarysideandsecondarysideswitches,TAFSETandTBESET.Dead-timeprogrammingfortheprimaryswitchesoverCSvoltagerange,TABSETandTCDSET.Currentsenseforcycle-by-cycleover-currentprotectionandadaptivedelayfunctions.SynchronizationoutfromMastercontrollertoinputofslavecontroller.0.2-Asink/sourcesynchronousswitchingoutput.0.2-Asink/sourcesynchronousswitchingoutput.0.2-Asink/sourceprimaryswitchingoutput.0.2-Asink/sourceprimaryswitchingoutput.0.2-Asink/sourceprimaryswitchingoutput.0.2-Asink/sourceprimaryswitchingoutput.Biassupplyinput. Ground.Allsignalsarereferencedtothisnode. Copyright©2010,TexasInstrumentsIncorporatedSubmitDocumentationFeedback ProductFolderLink(s):UCC28950 7 UCC28950 SLUSA16A–MARCH2010–REVISEDJULY2010 www.ti.com FunctionalBlockDiagram ADEL14VDDVDD23++7.3VRise-6.7VFallVREF 1ON/OFFVDDUVLOCOMPThermalShutdownENVDD22OUTA ReferenceGeneratorProgrammableDelayAB6DELAB 5VLDO21OUTB COMPEA-EA+ 432PWMCOMP20OUTC +++LogicBlockLower\"+\"InputisDominantRT10CLKProgrammableDelayCD7DELCD 19OUTD OscillatorRAMP2.8V0.8V13ADELEF RSUM11RampSummingCS+Cycle-by-CycleILIM18OUTE CS15SynchronizationBlock2VProgrammableDelayEFSoftStatandEnablewith0.55VThreshold8DELEF +-CSLight-LoadEfficiencyBlock17OUTF 16SYNC 24GND 12DCM 9TMIN 5SS/EN TypicalApplicationDiagram +VS-CTCREFR1R212R3VSENSER6R4C3C2CSSENABLERABRCDREFRTVREFRSUMVREFRDCM(hi)RTMINC1R53456789UCC28950VREFEA+EA-COMPSS/ENDELABDELCDDELEFTMINGND24CVDDVDD23OUTA22OUTB21OUTC20OUTD19OUTE18OUTF17SYNC16CS15ADEL14ADELEF13RARCSRDCMRAEFVSENSEABCDEFSYNCRA(hi)UCC27324QEUCC27324QFBAVDDVDDQAQCVDDCVDDQBQDVDDDVOUT+10RT11RSUM12DCMRAEF(hi)EF-VoltageCurrentSenseR78SubmitDocumentationFeedback ProductFolderLink(s):UCC28950 Copyright©2010,TexasInstrumentsIncorporated UCC28950 www.ti.com SLUSA16A–MARCH2010–REVISEDJULY2010 StartupTimingDiagram Nooutputdelayshown,COMP-to-RAMPoffsetnotincluded. SS>0.5V,thenreleaseCOMP,DCM,CS,OutputsA,B,C,D,EandFVDD7.3-Vrise,6.7-VfallVDD_GOODVREFVREF_GOOD4.8-Vrise,4.6-VfallTMINCOMPRAMPPWMCLKTMINAdd0.85VoffsettoRAMPNoPWMpulsesshorterthanTMINexceptduringcycle-by-cyclecurrentlimitABCDEFigure1.UCC28950TimingDiagram NOTE ThereisnopulseonOUTEduringburstmodeatstartup.TwofallingedgePWMpulsesarerequiredbeforeenablingthesynchronousrectifieroutputs. FBurstModeatthebeginningofstartupuntilPWM>TMINpulsesPWMTMIN2VP-PCopyright©2010,TexasInstrumentsIncorporatedSubmitDocumentationFeedback ProductFolderLink(s):UCC28950 9 UCC28950 SLUSA16A–MARCH2010–REVISEDJULY2010 www.ti.com SteadyState/ShutdownTimingDiagram Nooutputdelayshown,COMP-to-RAMPoffsetnotincluded. 7.3V rise, 6.7V fallVDDVDD_GOOD4.8V rise, 4.6V fallVREFVREF_GOODCLKTMINAdd 0.85V offset to RAMPCOMP2Vp-pRAMPPWMNo PWM pulses shorter than TMIN exceptduring cycle-by-cycle current limitVDD failed and VDD_GOOD goes low,Everything is shutdownTMINABCDEFFigure2.UCC28950TimingDiagram 10SubmitDocumentationFeedback ProductFolderLink(s):UCC28950 Copyright©2010,TexasInstrumentsIncorporated www.ti.com ÓÉ Foxit Reader ±à¼-UCC28950°æȨËùÓÐ (C) Foxit Software Company,2005-2006½öÓÃÓÚÆÀ¹À¡£SLUSA16A–MARCH2010–REVISEDJULY2010 DETAILEDPINDESCRIPTIONANDPARAMETERSETTINGS Start-UpProtectionLogic BeforetheUCC28950controllerwillstartup,thefollowingconditionsmustbemet: •VDDvoltageexceedsrisingUVLOthreshold7.3Vtypical.•The5-Vreferencevoltageisavailable. •Junctiontemperatureisbelowthethermalshutdownthresholdof140°C.•Thevoltageonthesoft-startcapacitorisnotbelow0.55Vtypical. Ifallthoseconditionsaremet,aninternalenablesignalENisgeneratedthatinitiatesthesoftstartprocess.ThedutycycleduringthesoftstartisdefinedbythevoltageattheSSpin,andcannotbelowerthanthedutycyclesetbyTMIN,orbycycle-by-cyclecurrentlimitcircuitdependingonloadconditions.VoltageReference(VREF) Theaccurate(±1.5%)5-Vreferencevoltageregulatorwiththeshortcircuitprotectioncircuitsuppliesinternalcircuitryandprovidesupto20-mAexternaloutputcurrentforsettingDC/DCconverterparameters.PlacelowESRandESL,preferablyceramicdecouplingcapacitorCREFin1µFto2.2µFrangefromthispintoGNDasclosetotherelatedpinsaspossibleforbestperformance.Theonlyconditionwherethereferenceregulatorisshutdowninternallyisduringundervoltagelockout. ErrorAmplifier(EA+,EA-,COMP) Theerroramplifierhastwouncommittedinputs,EA+andEA-,witha3-MHzunitybandwidth,whichallowsflexibilityinclosingthefeedbackloop.TheEA+isanon-invertinginput,theEA-isaninvertinginputandtheCOMPistheoutputoftheerroramplifier.Theinputvoltagecommonmoderange,wheretheparametersoferroramplifierareguaranteed,isfrom0.5Vto3.6V.Theoutputoftheerroramplifierisconnectedinternallytothenon-invertinginputofthePWMcomparator.Therangeoftheerroramplifieroutputof0.25Vto4.25VfarexceedsthePWMcomparatorinputramp-signalrange,whichisfrom0.8Vto2.8V.Thesoft-startsignalservesasanadditionalnon-invertinginputoftheerroramplifier.Thelowerofthetwonon-invertinginputsoftheerroramplifieristhedominantinputandsetsthedutycyclewheretheoutputsignaloftheerroramplifieriscomparedwiththeinternalrampattheinputsofthePWMcomparator. Copyright©2010,TexasInstrumentsIncorporatedSubmitDocumentationFeedback ProductFolderLink(s):UCC28950 11 UCC28950 SLUSA16A–MARCH2010–REVISEDJULY2010 ÓÉ Foxit Reader ±à¼-°æȨËùÓÐ (C) Foxit Software Company,2005-2006½öÓÃÓÚÆÀ¹À¡£www.ti.com SoftStartandEnable(SS/EN) Thesoft-startpinSS/ENisamulti-functionpinusedforthefollowingoperations: •ClosedloopsoftstartwiththegradualdutycycleincreasefromtheminimumsetbyTMINuptothesteadystatedutycyclerequiredbytheregulatedoutputvoltage. •Settinghiccupmodeconditionsduringcycle-by-cycleovercurrentlimit.•On/offcontrolfortheconverter. Duringsoftstart,oneofthevoltagesattheSS/ENorEA+pins,whicheverislower(SS/EN-0.55V)orEA+voltage(seeBlockDiagram),setsthereferencevoltageforaclosedfeedbackloop.BothSS/ENandEA+signalsarenon-invertinginputsoftheerroramplifierwiththeCOMPpinbeingitsoutput.ThusthesoftstartalwaysgoesundertheclosedfeedbackloopandthevoltageatCOMPpinsetsthedutycycle.ThedutycycledefinedbyCOMPvoltagecannotbeshorterthanTMINpulsesetbytheuser.However,iftheshortestdutycycleissetbythecycle-by-cyclecurrentlimitcircuit,thenitbecomesdominantoverthedutycycledefinedbyCOMPvoltageorbyTMINblock. Thesoft-startdurationisdefinedbyanexternalcapacitorCSS,connectedbetweenSS/ENpinandground,andtheinternalchargecurrentthathastypicalvalueof25µA.Pullingthesoft-startpinexternallybelow0.55Vshutsdownthecontroller.Thereleaseofthesoft-startpinenablesthecontrollertostart,andifthereisnocurrentlimitcondition,thedutycycleappliedtotheoutputinductorgraduallyincreasesuntilitreachesthesteadystatedutycycledefinedbytheregulatedoutputvoltageoftheconverter.ThishappenswhenthevoltageattheSS/ENpinreachesandthenexceedsthevoltageatEA+pindefinedasVNIby0.55V.Thusforthegivensoft-starttimeTSS,theCSSvaluecanbedefinedbyEquation1orEquation2: CSS(master)=CSS(slave)= TSS´25mA(VNI+0.55)TSS (1) 20.6æö 825K´Lnç÷ è20.6-VNI-0.55ø (2) Forexample,inEquation1,ifthesoft-starttimeTSSisselectedtobe10ms,andtheVNIis2.5V,thenthesoft-startcapacitorCSSisequalto82-nF. NOTE IftheconverterisconfiguredinSlaveMode,makesureyouplacean825-kΩresistorfromSSpintoground. Light-LoadPowerSavingMode TheUCD28950offersfourdifferentlight-loadmanagementtechniquesforimprovingtheefficiencyofapowerconverteroverawideloadcurrentrange.1.AdaptiveDelay, (a)ADEL,whichsetsandoptimizesthedead-timecontrolfortheprimaryswitchesoverwideloadcurrent range. (b)ADELEF,whichsetsandoptimizesthedelay-timecontrolbetweentheprimarysideswitchesandthe secondarysideswitches. 2.TMIN,setstheminimumdutycycleaslongasthepartisnotincurrentlimitmode. 3.Dynamicsynchronousrectifieron/offcontrolinDCMMode,Forincreasedefficiencyatlightloads.TheDCMModestartswhenthevoltageatCSpinislowerthanthethresholdsetbytheuser.InDCMMode,thesynchronousoutputdrivesignalsOUTEandOUTFarebroughtdownlow. 4.BurstMode,formaximumefficiencyatverylightloadsornoload.BurstModehasanevennumberofPWMTMINpulsesfollowedbyofftime.TransitiontotheBurstModeisdefinedbytheTMINdurationsetbytheuser. 12SubmitDocumentationFeedback ProductFolderLink(s):UCC28950 Copyright©2010,TexasInstrumentsIncorporated UCC28950 www.ti.com SLUSA16A–MARCH2010–REVISEDJULY2010 AdaptiveDelay,(DelaybetweenOUTAandOUTB,OUTCandOUTD(DELAB,DELCD,ADEL)) TheresistorRABfromtheDELABpin,DELABtoGND,alongwiththeresistordividerRAHIfromCSpintoADELpinandRAfromADELpintoGNDsetsthedelayTABSETbetweenoneofoutputsOUTAorOUTBgoinglowandanotheroutputgoinghighFigure3. TABSET2TCDSET2TABSET2TCDSET2OUTA(OUTC)OUTB(OUTD)TABSET1TCDSET1TABSET1TCDSET1Figure3.DelaydefinitionsbetweenOUTAandOUTB,OUTCandOUTD ThisdelaygraduallyincreasesasafunctionoftheCSsignalfromTABSET1,whichismeasuredatVCS=1.8V,toTABSET2,whichismeasuredattheVCS=0.2V.Thisapproachensurestherewillbenoshoot-throughcurrentduringthehigh-sideandlow-sideMOSFETswitchingandoptimizesthedelayforZVSconditionoverawideloadcurrentrange.DependingontheresistordividerRAHIandRA,theproportionalratiobetweenlongestandshortestdelayisset.ThemaxratioisachievedbytyingtheCSandADELpinstogether.IfADELisconnectedtoGND,thenthedelayisfixed,definedonlybytheresistorRABfromDELABtoGND.ThedelayTCDSET1andTCDSET2settingsandtheirbehaviourforoutputsOUTCandOUTDareverysimilartotheonedescribedforOUTAandOUTB.ThedifferenceisthatresistorRCDconnectedbetweenDELCDpinandGNDsetsthedelayTCDSET.DelaysforoutputsOUTCandOUTDsharewiththeoutputsOUTAandOUTBthesameCSvoltagedependencepinADEL. Copyright©2010,TexasInstrumentsIncorporatedSubmitDocumentationFeedback ProductFolderLink(s):UCC28950 13 UCC28950 SLUSA16A–MARCH2010–REVISEDJULY2010 ÓÉ Foxit Reader ±à¼-°æȨËùÓÐ (C) Foxit Software Company,2005-2006½öÓÃÓÚÆÀ¹À¡£www.ti.com ThedelaytimeTABSETisdefinedbythefollowingEquation3. æö5´RAB TABSET=ç÷ns+5ns è0.15V+CS´KA´1.46ø ThesameequationisusedtodefinethedelaytimeTCDSETinanotherlegexceptRABisreplacedbyRCD. (3) æö5´RCD TCDSET=ç÷ns+5ns è0.15V+CS´KA´1.46ø (4) IntheseequationsRABandRCDareinkΩandCS,thevoltageatpinCS,isinvoltsandKAisanumericalcoefficientintherangefrom0to1.ThedelaytimeTABSETandTCDSETareinns.Theseequationsareempiricalandtheyareapproximatedfrommeasureddata.Thus,thereisnounitagreementintheequations.Asanexample,assumeRAB=15kΩ,CS=1VandKA=0.5.ThentheTABSETisgoingtobe90.25ns.InbothEquation3andEquation4,KAisthesameandisdefinedas: KA= RA RA+RAHI (5) KAsetshowthedelayissensitivetoCSvoltagevariation.IfKA=0(ADELshortedtoGND),thedelayisfixed.IfKA=1(ADEListiedtoCS),thedelayismaximumatCS=0.2VandgraduallydecreaseswhenCSgoesupto1.8V.Theratiobetweenthemaximumandminimumdelaycanbeupto6:1. ItisrecommendedtostartbysettingKA=0andsetTABSETandTCDSETrelativelylargeusingequationsorplotsinthedatasheettoavoidhardswitchingorevenshootthroughcurrent.ThedelaybetweenoutputsA,BandC,DsetbyresistorsRABandRCSaccordingly.Programtheoptimaldelaysatlightloadfirst.ThenbychangingKAsettheoptimaldelayfortheoutputsA,Batmaximumcurrent.KAforoutputsC,DisthesameasforA,D.UsuallyoutputsC,DalwayshaveZVSifsufficientdelayisprovided.NOTE TheallowedresistorrangeonDELABandDELCD,RABandRCDare13kΩto90kΩ. 14SubmitDocumentationFeedback ProductFolderLink(s):UCC28950 Copyright©2010,TexasInstrumentsIncorporated UCC28950 www.ti.com SLUSA16A–MARCH2010–REVISEDJULY2010 RAandRAHIdefinetheportionofvoltageatpinCSappliedtothepinADEL(SeeTypicalApplicationDiagram).KAdefineshowsignificantlythedelaytimedependsonCSvoltage.Kavariesfrom0,whereADELpinisshortedtoground(RA=0)andthedelaydoesnotdependonCSvoltage,to1,whereADEListiedtoCS(RAH=0).SettingKA,RABandRCDprovidestheabilitytomaintainoptimalZVSconditionsofprimaryswitchesoverloadcurrentbecausethevoltageatCSpinincludesreflectedloadcurrenttoprimarysidethroughthecurrentsensingcircuit.TheplotsinFigure4andFigure5showthedelaytimesettingsasafunctionofCSvoltageandKAfortwodifferentconditions:RAB=RCD=13kΩ(Figure4)andRAB=RCD=90kΩ(Figure5). TIMEDELAY(RAB=RCD=13kW) vs CSVOLTAGE 350300TABSET,TCDSET-TimeDelay-ns250200 KA=0.0KA=0.1KA=0.25KA=0.50KA=0.75KA=1.0 15010050 5 0.0 0.2 0.4 0.6 0.8 1.01.2 1.4 1.6 1.82.0 CSVoltage-V Figure4.DelayTimeSetTABSETandTCDSET (OverCSvoltagevariationandselectedKAforRABandRCDequal13kΩ) TIMEDELAY(RAB=RCD=90kW) vs CSVOLTAGE 20001800TABSET,TCDSET-TimeDelay-ns16001400120010008006004002000 0.0 0.2 0.4 0.6 0.8 1.01.2 1.4 1.6 1.82.0 CSVoltage-V KA=0.0KA=0.1KA=0.25KA=0.50KA=0.75KA=1.0 Figure5.DelaytimesetTABSETandTCDSET (OverCSvoltagevariationandselectedKAforRABandRCDequal90kΩ) Copyright©2010,TexasInstrumentsIncorporatedSubmitDocumentationFeedback ProductFolderLink(s):UCC28950 15 UCC28950 SLUSA16A–MARCH2010–REVISEDJULY2010 www.ti.com AdaptiveDelay(DelaybetweenOUTAandOUTF,OUTBandOUTE(DELEF,ADELEF)) TheresistorREFfromtheDELEFpintoGNDalongwiththeresistordividerRAEFHIfromCSpintoADELEFpinandRAEFfromADELEFpintoGNDsetsequaldelaysTAFSETandTBESETbetweenoutputsOUTAorOUTBgoinglowandrelatedoutputOUTForOUTEgoinglowFigure6. OUTA(OUTB)OUTD(OUTC)TAFSET1TBESET1OUTF(OUTE)TAFSET2TBESET2Figure6.DelayDefinitionsBetweenOUTAandOUTF,OUTBandOUTE ThesedelaysgraduallyincreaseasfunctionofCSsignalfromTAFSET1,whichismeasuredatVCS=0.2V,toTAFSET2,whichismeasuredatVCS=1.8V.OppositetotheDELABandDELCDbehaviour,thisdelayislongest(TAFSET2)whenthesignalatCSpinismaximizedandshortest(TAFSET1)whentheCSsignalisminimized.ThisapproachwillreducethesynchronousrectifierMOSFETbodydiodeconductiontimeoverawideloadcurrentrangethusimprovingefficiencyandreducingdioderecoverytime.DependingontheresistordividerRAEFHIandRAEF,theproportionalratiobetweenlongestandshortestdelayisset.IfCSandADELEFaretied,theratioismaximized.IfADELEFisconnectedtoGND,thenthedelayisfixed,definedonlybyresistorREFfromDELEFtoGND. ThedelaytimeTAFSETisdefinedbythefollowingEquation6.ThesamedefinesthedelaytimeTBESET. ææöö5´REF +TAFSET=ççns4ns÷ç2.65V-CS´K´1.32÷÷ EFøèèø (6) InthisequationREFisinkΩ,theCS,whichisthevoltageatpinCS,isinvoltsandKEFisanumericalgainfactor ofCSvoltagefrom0to1.ThedelaytimeTAFSETisinns.Thisequationisempiricalapproximationofmeasureddata,thus,thereisnounitagreementinit.Asanexampleofcalculation,assumeREF=15kΩ,CS=1VandKEF=0.5.ThentheTAFSETisgoingtobe41.7ns.KEFisdefinedas: KEF= RAEF RAEF+RAEF(hi) (7) RAEFandRAEFHIdefinetheportionofvoltageatpinCSappliedtothepinADELEF(SeeTypicalApplicationDiagram).KEFdefineshowsignificantlythedelaytimedependsonCSvoltage.KEFvariesfrom0,whereADELEFpinisshortedtoground(RAEF=0)andthedelaydoesnotdependonCSvoltage,to1,whereADELEFistiedtoCS(RAEFHI=0). NOTE TheallowedresistorrangeonDELEF,REFis13kΩto90kΩ. 16SubmitDocumentationFeedback ProductFolderLink(s):UCC28950 Copyright©2010,TexasInstrumentsIncorporated UCC28950 www.ti.com SLUSA16A–MARCH2010–REVISEDJULY2010 TheplotsinFigure7andFigure8showdelaytimesettingsasfunctionofCSvoltageandKEFfortwodifferentconditions:REF=13kΩ(Figure7)andREF=90kΩ(Figure8) TIMEDELAY(TEF=REF=13kW) vs CSVOLTAGE 350300TAFSET,TBESET-TimeDelay-ns250200 KA=0.00KA=0.25KA=0.50KA=0.75KA=0.90KA=1.00 15010050 5 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 CSVoltage-V Figure7.DelayTimeTAFSETandTBESET (OverCSvoltageandselectedKEFforREFequal13kΩ) TIMEDELAY(TAF=RBE=90kW) vs CSVOLTAGE 20001800TAFSET,TBESET-TimeDelay-ns16001400120010008006004002005 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 CSVoltage-V KA=0.0KA=0.4KA=0.5KA=0.8KA=0.9KA=1.0 Figure8.DelayTimeTAFSETandTBESET (OverCSvoltageandselectedKEFforREFequal90kΩ) Copyright©2010,TexasInstrumentsIncorporatedSubmitDocumentationFeedback ProductFolderLink(s):UCC28950 17 UCC28950 SLUSA16A–MARCH2010–REVISEDJULY2010 www.ti.com MinimumPulse(TMIN) TheresistorRTMINfromTMINpintoGNDsetsfixedminimumpulseTMINappliedtotheoutputrectifierenablingZVSoftheprimaryswitchesatlightload.IftheoutputPWMpulsedemandedbythefeedbackloopisshorterthanTMIN,thencontrollerproceedstotheburstmodeofoperationwhereevennumberofTMINpulsesarefollowedbytheofftimedictatedbythefeedbackloop.TheproperselectionofTMINdurationisdictatedbythetimeittakestoraisethesufficientmagnetizingcurrentinthepowertransformertomaintainZVS.TheminimumpulseTMINisdefinedbythefollowingEquation8. TMIN=(5.92´RTMIN)ns InthisequationRTMINisinkΩandTMINisinns. NOTE TheminimumallowedresistoronTMIN,RTMINis13kΩ. TherelatedplotisshowninFigure9 MINIMUMTIME vs RESISTORSETTING 900800700TMIN-MinimumTime-ns(8) 6005004003002001000 5 152535455565758595105115125 RTMIN-ResistorSetting-kW Figure9.MinimumTimeTMINOverSettingResistorRTMIN ThevalueofminimumdutycycleDMINisdeterminedbyEquation9. DMIN=TMIN´FSW(osc)´10-4% Here,FSW(osc)isoscillatorfrequencyinkHz,TMINistheminimumpulseinnsandDMINisinpercents. () (9) BurstMode IftheconverteriscommandingadutycyclelowerthanTMIN,thenthecontrollerwillgointoBurstMode.ThecontrollerwillalwaysdeliverevennumberofPowercyclestoPowertransformer.ThecontrolleralwaysstopsitsburstswithOUTBandOUTCpowerdeliverycycle.IfthecontrollerisstilldemandingadutycyclelessthanTMIN,thenthecontrollergoesintoshutdownmode.ThenitwaitsuntiltheconverterisdemandingadutycycleequalorhigherthanTMINbeforethecontrollerputsoutTMINoraPWMdutycycleasdictatedbyCOMPvoltagepin. 18SubmitDocumentationFeedback ProductFolderLink(s):UCC28950 Copyright©2010,TexasInstrumentsIncorporated UCC28950 www.ti.com SLUSA16A–MARCH2010–REVISEDJULY2010 SwitchingFrequencySetting(RT) ConnectinganexternalresistorRTbetweentheRTpinandVREFpinssetsthefixedfrequencyoperationandconfiguresthecontrollerasamasterprovidingsynchronizationoutputpulsesatSYNCpinwith0.5dutycycleandfrequencyequaltotheinternaloscillator.TosettheconverterinSlaveMode,connecttheexternalresistorRTbetweenRT-pintoGNDandplacean825-kΩresistorformSSpintoGNDinparalleltotheSS_ENcapacitor.Thisconfiguresthecontrollerasaslave.Theslavecontrolleroperateswith90°phaseshiftrelativelytothemasterconverteriftheirSYNCpinsaretiedtogether.Theswitchingfrequencyoftheconverterisequaltothefrequencyofoutputpulses.ThefollowingEquation10definesthenominalswitchingfrequencyoftheconverterconfiguredasamaster(resistorRTbetweenRT-pinandVREF).OntheUCC28950thereisaninternalclockoscillatorfrequencywhichistwiceasthatofthecontrolleroutputsfrequency. FSW(nom) æöç÷3 2.5´10÷kHz=ç çæRTkWö÷çççV-2.5V+1´V÷÷÷ øøèèREF (10) InthisequationtheRTisinkΩ,VREFisinvoltsandFSW(nom)isinkHz.Thisisalsoempiricalapproximationand thus,thereisnounitagreement.Assumeforexample,VREF=5V,RT=65kΩ.ThentheswitchingfrequencyFSW(nom)isgoingtobe92.6kHz. TheEquation11definesthenominalswitchingfrequencyofconverteriftheconverterconfiguredasaslaveandtheresistorRTisconnectedbetweenRTpinandGND. FSW(nom) æöç÷3 2.510´÷kHz=ç çæRTkWö÷ 1+´çç÷÷2.5VVèøøè (11) InthisequationtheRTisinkΩ,andFSW(nom)isinkHz.NoticethatforVREF=5V,Equation10andEquation11 yieldthesameresults. TheplotinFigure10showshowFSW(nom)dependsontheresistorRTvaluewhentheVREF=5V.AsitisseenfromEquation10andEquation11,theswitchingfrequencyFSW(nom)issettothesamevalueforeithermaster,ofslaveconfigurationprovidedthesameresistorvalueRTisused. SWITCHINGFREQUENCY vs RESISTORRTVALUE 1000900FSW(nom)-SwitchingFrequency-kHz8007006005004003002001000 5 152535455565758595105115125 RT-Resistor-kW Figure10.ConverterSwitchingFrequencyFSW(nom)OverResistorRTValue Copyright©2010,TexasInstrumentsIncorporated SubmitDocumentationFeedback ProductFolderLink(s):UCC28950 19 UCC28950 SLUSA16A–MARCH2010–REVISEDJULY2010 ÓÉ Foxit Reader ±à¼-°æȨËùÓÐ (C) Foxit Software Company,2005-2006½öÓÃÓÚÆÀ¹À¡£www.ti.com SlopeCompensation(RSUM) SlopecompensationisthetechniquethataddsadditionalrampsignaltotheCSsignalandappliedtothe: •InputofPWMcomparatorincaseofpeakcurrentmodecontrol.•Inputofcycle-by-cyclecurrentlimitcomparator. Thispreventssub-harmonicoscillationatD>50%(somepublicationssuggestitmighthappenevenatD<50%).Atlowdutycycleandlightload,theslopecompensationrampreducesnoisesensitivityofPeakCurrentModecontrol. ToomuchadditionalslopecompensationrampreducesbenefitsofPCMcontrol.Incaseofcycle-by-cyclecurrentlimit,theaveragecurrentlimitbecomeslowerandthismightreducethestartupcapabilitywiththelargeoutputcapacitance.Theoptimalcompensationslopevariesdependingondutycycle,LOandLM.Theslopecompensationisneededforthecontrolleroperatingatpeakcurrentmodecontrolorduringthecycle-by-cyclecurrentlimitatdutycycleabove50%.PlacingaresistorfromRSUMpintogroundallowsthecontrollertooperateinpeakcurrentcontrolmode.ConnectingRSUMpinthroughresistortoVREFswitchescontrollertothevoltagemodecontrolwiththeinternalPWMramp.However,theresistorvaluestillprovidesCSsignalcompensationforcycle-by-cyclecurrentlimit.Inotherwords,inVMC,theslopecompensationisappliedonlytocycle-by-cyclecomparator.WhileinPCM,theslopecompensationappliedtobothPWMandcycle-by-cyclecurrentlimitcomparators. TheoperationlogicofslopecompensationcircuitisshowninFigure11.COMP4++OscillatorVREF VCMCLKPCM0.85 VRampGeneratorRAMPRSUM11VMCTwo DirectionCurrent SenseRampSummingCycle-by-Cycle ILIMCS_SLOPECOMP+2 V+-CS15Mode SelectGND PCM7GND Figure11.TheOperationLogicofSlopeCompensationCircuit Theslopeoftheadditionalramp,me,addedtoCSsignalbyplacingaresistorfromRSUMpintothegroundisdefinedbythefollowingEquation12. æöV2.5me=ç÷ ´0.5RSUMømsè (12) 20SubmitDocumentationFeedback ProductFolderLink(s):UCC28950 Copyright©2010,TexasInstrumentsIncorporated UCC28950 www.ti.com SLUSA16A–MARCH2010–REVISEDJULY2010 IftheresistorfromRSUMpinisconnectedtoVREFpin,thenthecontrolleroperatesinvoltagemodecontrol,stillhavingtheslopecompensationaddedtoCSsignalusedforcycle-by-cyclecurrentlimit.InsuchacasetheslopeisdefinedbythefollowingEquation13. æ(VREF-2.5V)öVme=ç÷ è0.5´RSUMøms (13) InEquation12andEquation13,theVREFisinvolts,RSUMisinkΩ,andmeisinV/µs.Theseareempiricalequationswithoutunitagreement.Asanexample,substitutingVREF=5VandRSUM=40kΩ,yieldstheresult0.125V/µs.TherelatedplotofmeasfunctionofRSUMisshowninFigure12.BecauseVREF=5V,theplotsgeneratedfromEquation12andEquation13coincide. SLOPEvs RESISTOR 0.500.450.400.35Slope-V/ms0.300.250.200.150.100.050 5 20 40 60 80 100120140160180200 Rsum-Resistor-kW Figure12.SlopeoftheAddedRampOverResistorRSUM NOTE TherecommendedresistorrangeforRSUMis10kΩto1MΩ. Copyright©2010,TexasInstrumentsIncorporatedSubmitDocumentationFeedback ProductFolderLink(s):UCC28950 21 UCC28950 SLUSA16A–MARCH2010–REVISEDJULY2010 www.ti.com DynamicSRON/OFFControl(DCMMode) ThevoltageattheDCMpinprovidedbytheresistordividerRdcmhibetweenVREFpinandDCM,andRdcmfromDCMpintoGND,setsthepercentageof2-VcurrentlimitthresholdfortheCurrentSensepin,(CS).IftheCSpinvoltagefallsbelowtheDCMpinthresholdvoltage,thenthecontrollerinitiatesthelightloadpowersavingmode,andshutsdownthesynchronousrectifiers,OUTEandOUTF.IftheCSpinvoltageishigherthantheDCMpinthresholdvoltage,thenthecontrollerrunsinCCMmode.ConnectingtheDCMpintoVREFmakesthecontrollerruninDCMmodeandshutsbothOutputsOUTEandOUTF.ShortingtheDCMpintoGNDdisablestheDCMfeatureandthecontrollerrunsinCCMmodeunderallconditions. VREF120mARDCM(hi)CSR = 77 kW15R = 77 kW12C = 6.5 pFDCM_COMP+PWM2-CycleCounter0 = DCM1 = CCMDCMRDCMC = 6.5 pFOther BlocksFigure13.DCMFunctionalBlock MovingintoDCMMode0.8DUTYCYCLEvsLOADCURRENTVS(max)0.6DutyCycle-%VS(min)0.4SettingDMIN15.6%BurstModeArea0.200 1 2 3 4 5 6 7 8 9 10 LoadCurrent-A Figure14.DutyCycleChangeOverLoadCurrentChange 22SubmitDocumentationFeedback ProductFolderLink(s):UCC28950 Copyright©2010,TexasInstrumentsIncorporated UCC28950 www.ti.com SLUSA16A–MARCH2010–REVISEDJULY2010 Thereisanominal20-µAswitchedcurrentsourceusedtocreatehysteresis.ThecurrentsourceisactiveonlywhenthesystemisinDCMMode.Otherwise,itisinactiveanddoesnotaffectthenodevoltage.Therefore,whenbeinginDCMregion,theDCMthresholdisthevoltagedividerplusΔVexplainedinEquation14below.WhenbeinginCCMregion,thethresholdisthevoltagesetbytheresistordivider.WhenCSpinreachesthethresholdsetontheDCMpin,thesystemwaitstoseetwoconsecutivefallingedgePWMcyclesbeforeswitchingfromCCMtoDCMandvice-versa.Themagnitudeofthehysteresisisafunctionoftheexternalresistordividerimpedance.ThehysteresiscanbecalculatedusingthefollowingEquation14: DV=2´10-5 RDCMHI´RDCMRDCMHI+RDCM (14) PWM DCMThreshold+Hysteresis CSEF Figure15.MovingfromDCMtoCCMMode PWM DCMThreshold+Hysteresis CSEF Figure16.MovingfromCCMtoDCMMode DCMmustbeusedinordertopreventreversecurrentintheoutputinductorwhichcouldcausethesynchronousFETStofail. Copyright©2010,TexasInstrumentsIncorporatedSubmitDocumentationFeedback ProductFolderLink(s):UCC28950 23 UCC28950 SLUSA16A–MARCH2010–REVISEDJULY2010 www.ti.com CurrentSensing(CS) Thesignalfromcurrentsensepinisusedforcycle-by-cyclecurrentlimit,peak-currentmodecontrol,light-loadefficiencymanagementandsettingthedelaytimeforoutputsOUTA,OUTB,OUTC,OUTDanddelaytimeforoutputsOUTE,OUTF.ConnectthecurrentsenseresistorRCSbetweenCSandGND.Dependingonlayout,topreventapotentialelectricalnoiseinterference,itisrecommendedtoputasmallR-CfilterbetweenRCSresistorandCSpin. Cycle-by-CycleCurrentLimitCurrentProtectionandHiccupMode Thecycle-by-cyclecurrentlimitprovidespeakcurrentlimitingontheprimarysideoftheconverterwhentheloadcurrentexceedsitspredeterminedthreshold.Forpeakcurrentmodecontrol,certainleadingedgeblankingtimeisneededtopreventthecontrollerfromfalsetrippingduetoswitchingnoise.InordertosaveexternalRCfilterfortheblankingtime,aninternal30-nsfilteratCSinputisprovided.ThetotalpropagationdelayTCSfromCSpintooutputsis100ns.AnexternalRCfilterisstillneededifthepowerstagerequiresmoreblankingtime.The2.0-V±3%cycle-by-cyclecurrentlimitthresholdisoptimizedforefficientcurrenttransformerbasedsensing.Thedurationwhenaconverteroperatesatcycle-by-cyclecurrentlimitdependsonthevalueofsoft-startcapacitorandhowseveretheovercurrentconditionis.ThisisachievedbytheinternaldischargecurrentIDSEquation15andEquation16atSSpin. IDS(master)=(-25´(1-D)+5)mAIDS(slave)=(-25´(1-D))mA (15)(16) Thesoft-startcapacitorvaluealsodeterminesthesocalledhiccupmodeoff-timeduration.Thebehavioroftheconverterduringdifferentmodesofoperation,alongwithrelatedsoftstartcapacitorcharge/dischargecurrentsareshowninFigure17. SSPin(V)SSClampVoltagePullUpThreshold 4.653.703.60SoftStartCycle-by-CycleILIMNormal.OperationOFFTimeBeforeRestart25mASoftRestartFastPullUpby1kWSwitchIDS=(-25x(1-D)+5)mAOutputEnable Threshold 0.550.00ISS=25mAIHCC=2.5mAOutputPulses(D) Figure17.TimingDiagramofSoft-StartVoltageVSS 24SubmitDocumentationFeedback ProductFolderLink(s):UCC28950 Copyright©2010,TexasInstrumentsIncorporated UCC28950 www.ti.com SLUSA16A–MARCH2010–REVISEDJULY2010 Thelargestdischargecurrentof20µAiswhenthedutycycleisclosetozero.Thiscurrentsetstheshortestoperationtimeduringthecycle-by-cyclecurrentlimitwhichisdefinedas: TCL(on_master)=TCL(on_slave)= CSS´(4.65V-3.7V) 20mA25mA (17) CSS´(4.65V-3.7V) (18) Thus,ifthesoft-startcapacitorCSS=100nFisselected,thentheTCL(on)timewillbe5ms. TocalculatethehiccupofftimeTCL(off)beforetherestart,thefollowingEquation19orEquation20needstobeused: TCL(off_master)= CSS´(3.6V-0.55V) 2.5mA (19) TCL(off_slave)= CSS´(3.6V-0.55V) 4.9mA (20) Withthesamesoftstartcapacitorvalue100nF,theofftimebeforetherestartisgoingtobe122ms.Notice,thatiftheovercurrentconditionhappensbeforethesoftstartcapacitorvoltagereachesthe3.7-Vthresholdduringstartup,thecontrollerlimitsthecurrentbutthesoftstartcapacitorcontinuestobecharged.Assoonasthe3.7-Vthresholdisreached,thesoft-startvoltageisquicklypulleduptothe4.65-Vthresholdbyaninternal1-kΩRDS(on)switchandthecycle-by-cyclecurrentlimitdurationtimingstartsbydischargingthesoftstartcapacitor.Dependingonspecificdesignrequirements,theusercanoverridedefaultparametersbyapplyingexternalchargeordischargecurrentstothesoftstartcapacitor.Thewholecycle-by-cyclecurrentlimitandhiccupoperationisshowninFigure17.Inthisexamplethecycle-by-cyclecurrentlimitlastsabout5msfollowedby122msofofftime. Similartotheovercurrentcondition,thehiccupmodewiththerestartcanbeoverriddenbytheuserifapullupresistorisconnectedbetweentheSSandVREFpins.Ifthepullupcurrentprovidedbytheresistorexceeds2.5µA,thenthecontrollerremainsinthelatchoffmode.Inthiscase,anexternalsoft-startcapacitorvalueshouldbecalculatedwiththeadditionalpull-upcurrenttakenintoaccount.Thelatchoffmodecanberesetexternallyifthesoft-startcapacitorisforciblydischargedbelow0.55VortheVDDvoltageisloweredbelowtheUVLOthreshold. Copyright©2010,TexasInstrumentsIncorporatedSubmitDocumentationFeedback ProductFolderLink(s):UCC28950 25 UCC28950 SLUSA16A–MARCH2010–REVISEDJULY2010 www.ti.com Synchronization(SYNC) TheUCC28950allowsflexibleconfigurationofconvertersoperatinginsynchronizedmodebyconnectingallSYNCpinstogetherandbyconfigurationofthecontrollersasmasterand/orslaves.ThecontrollerconfiguredasMaster(resistorbetweenRTandVREF)providessynchronizationpulsesattheSYNCpinwiththefrequencyequalto2XtheconverterfrequencyFSW(nom)and0.5dutycycle.ThecontrollerconfiguredasaSlave(resistorbetweenRTandGNDand825-kΩresistorbetweenSS_ENpintoGND)doesnotgeneratethesynchronizationpulses.TheSlavecontrollersynchronizesitsownclocktothefallingedgeofsynchronizationsignalthusoperating90°phaseshiftedversusthemasterconverter’sfrequencyFSW(nom).BecausetheSlaveissynchronizedtothefallingedgeoftheSYNCpulses,theslaveoperatesat180˚delayedversusMaster’sCLKor90˚delayedversusoutputswitchingpulsesofMaster. SuchoperationbetweenMasterandSlaveprovidesmaximuminputcapacitorandoutputcapacitorripplecancellationeffectifinputsandoutputsofconvertersaretiedtogether.Toavoidsystemissuesduringthesynchronizedoperationoffewconvertersthefollowingconditionsshouldbetakencareof. •IfanyconverterisconfiguredaasaSlave,theSYNCfrequencymustbegreaterthanorequalto1.8timestheconverterfrequency. •Slaveconverterdoesnotstartuntilatleastonesynchronizationpulsehasbeenreceived. •IfanyorallconvertersareconfiguredasSlaves,theneachconverteroperatesatitsownfrequencywithoutsynchronizationafterreceivingatleastonesynchronizationpulse.Thus,Ifthereisaninterruptionofsynchronizationpulsesattheslaveconverter,thenthecontrollerusesitsowninternalclockpulsestomaintainoperationbasedontheRTvaluethatisconnectedtoGNDintheSlaveconverter.•InMastermode,SYNCpulsesstartafterSSpinpassesitsEnablethresholdwhichis0.55V. •SlavestartsgeneratingSS/ENvoltageeventhoughsynchronizationpulseshavenotbeenreceived. •ItisrecommendedthattheSSontheMastercontrollerstartsbeforetheSSontheSlavecontroller;thereforeSS/ENpinonmasterconvertermustreachitsEnablethresholdvoltagebeforeSS/ENontheslaveconverterstartsforproperoperation.Onthesamenote,it’srecommendedthatTMINresistorsonbothMasterandSlavearesetatthesamevalue. CLK SYNC_OUT A B Figure18.SYNC_OUT(MasterMode)TimingDiagram SYNC_IN CLKA B Figure19.SYNC_IN(SlaveMode)TimingDiagram 26 SubmitDocumentationFeedback ProductFolderLink(s):UCC28950 Copyright©2010,TexasInstrumentsIncorporated ÓÉ Foxit Reader ±à¼-°æȨËùÓÐ (C) Foxit Software Company,2005-2006UCC28950½öÓÃÓÚÆÀ¹À¡£ www.ti.com SLUSA16A–MARCH2010–REVISEDJULY2010 Outputs(OUTA,OUTB,OUTC,OUTD,OUTE,OUTF) •••••• AllMOSFETcontroloutputshave0.2-Adrivecapability. ThecontroloutputsareconfiguredasP-MOSandN-MOStotempoleswithtypicalRDS(on)20Ωand10Ωaccordingly. Thecontroloutputsarecapableofcharging100-pFcapacitorwithin12nsanddischargewithin8ns.TheamplitudeofoutputcontrolpulsesisequaltoVDD. ControloutputsaredesignedtobeusedwithexternalgateMOSFET/IGBTdrivers. Thedesignisoptimizedtopreventthelatchupofoutputsandverifiedbyextensivetests. TheUCC28950hasoutputsOUTA,OUTBdrivingtheactiveleg,initiatingthedutycyclelegofpowerMOSFETsinphase-shiftedfullbridgepowerstage,andoutputsOUTC,OUTDdrivingthepassiveleg,completingthedutycycleleg,asitisshownintypicaltimingdiagraminFigure47.OutputsOUTEandOUTFareoptimizedtodrivethesynchronousrectifierMOSFETs(Figure20).Theseoutputshave200-mApeak-currentcapabilitiesandaredesignedtodriverelativelysmallcapacitiveloadslikeinputsofexternalMOSFETorIGBTdrivers.Recommendedloadcapacitanceshouldnotexceed100pF.TheamplitudeofoutputsignalisequaltoVDDvoltage. ThecapacitorsCOSSshowninFigure20areinternalMOSFETcapacitancesthatmustbetakenintoaccountduringdesignproceduretoestimatezerovoltageconditionandswitchinglosses. +COSSOUTALLKXTLmCOSSOUTC RPRVS ACOSSOUTB-BCOSSOUTD COSSOUTECOSSOUTFLODCRCO- VOUT+ Figure20.PowerStage Copyright©2010,TexasInstrumentsIncorporatedSubmitDocumentationFeedback ProductFolderLink(s):UCC28950 27 UCC28950 SLUSA16A–MARCH2010–REVISEDJULY2010 ÓÉ Foxit Reader ±à¼-°æȨËùÓÐ (C) Foxit Software Company,2005-2006½öÓÃÓÚÆÀ¹À¡£ www.ti.com SupplyVoltage(VDD) Connectthispintobiassupplyfrom8Vto17Vrange.Placehighquality,lowESRandESL,atleast1-µFceramicbypasscapacitorCVDDfromthispintoGND.Itisrecommendedtouse10-ΩresistorinseriestoVDDpintoformRCfilterwithCVDDcapacitor. Ground(GND) Allsignalsarereferencedtothisnode.Itisrecommendedtohaveaseparatequiteanalogplaneconnectedinoneplacetothepowerplane.TheanalogplanecombinesthecomponentsrelatedtothepinsVREF,EA+,EA-,COMP,SS/EN,DELAB,DELCD,DELEF,TMIN,RT,RSUM.ThepowerplanecombinesthecomponentsrelatedtothepinsDCM,ADELEF,ADEL,CS,SYNC,OUTF,OUTE,OUTD,OUTC,OUTB,OUTA,andVDD.AnexampleoflayoutandgroundplanesconnectionisshowninFigure21. R1R2CREF12UCC28950VREFEA+EA-COMPSS/ENDELABDELCDDELEFTMINGND24VDD23OUTA22OUTB21OUTC20OUTD19OUTE18OUTF17SYNC16CS15ADEL14ADELEF13RA(hi)ABCDEFCVDDVDDR3VSENSER4R6C3C2C1R534CSSENABLERABRCDREFRT(min)RTRSUM)RDCM(hi)VREF56789AnalogPlanePowerPlaneSYNC10RT11RSUM12DCMRARAEF(hi)CurrentSenseR7RCSRDCMRAEFFigure21.LayoutRecommendationforAnalogandPowerPlanes 28SubmitDocumentationFeedback ProductFolderLink(s):UCC28950 Copyright©2010,TexasInstrumentsIncorporated UCC28950 www.ti.com SLUSA16A–MARCH2010–REVISEDJULY2010 TYPICALCHARACTERISTICS UVLOTHRESHOLDS vs TEMPERATURE 7.6 UVLO-UnderVoltageLockoutHysteresis-mVUVLO-UnderVoltageLockoutThresholds-VUVLOHYSTERESIS vs TEMPERATURE 640 7.4UVLO_RTH630 7.27.06.86.66.4 UVLO_FTH620UVLO_HYST610 600 590 6.2 -40 25 TJ-Temperature-°C 125 580 -40 25 TJ-Temperature-°C 125 Figure22.Figure23. SUPPLYCURRENT vs TEMPERATURE 3.9 250 STARTUPCURRENT vs TEMPERATURE IDD-OperatingSupplyCurrent-mA3.8 IDD-StartupCurrent-mA200 3.7 150 3.6 100 3.5 3.4 -40 25 TJ-Temperature-°C 125 50 -40 25 TJ-Temperature-°C 125 Figure24.Figure25. Copyright©2010,TexasInstrumentsIncorporatedSubmitDocumentationFeedback ProductFolderLink(s):UCC28950 29 UCC28950 SLUSA16A–MARCH2010–REVISEDJULY2010 www.ti.com TYPICALCHARACTERISTICS(continued) VOLTAGEREFERENCE(VDD=12V) vs TEMPERATURE 5.010 ILOAD=10mAVREF-LineVoltageRegulation-VLINEVOLTAGEREGULATION(ILOAD=10mA) vs TEMPERATURE 5.001 5.005VREF-VoltageReference-V4.999 VREF_10mA_12VDD5.000 ILOAD=1mA4.997 VREF_10mA_10VDD4.9954.990 ILOAD=10mA4.9954.993 4.985 ILOAD=20mA4.991 VREF_10mA_8VDD4.9804.975 -40 25 TJ-Temperature-°C 125 4.9894.9874.985-40 25 TJ-Temperature-°C 125 Figure26.Figure27. SHORTCIRCUITCURRENT vs TEMPERATURE 38.5 95.495.2DMAX-MaximumDutyCycle-%MAXIMUMDUTYCYCLE vs TEMPERATURE 38.0ShortCircuitCurrent-mA95.094.894.694.494.294.093.893.6 37.537.036.536.0 35.535.0 -40 25 TJ-Temperature-°C 125 -4025 TJ-Temperature-°C 125 Figure28.Figure29. 30SubmitDocumentationFeedback ProductFolderLink(s):UCC28950 Copyright©2010,TexasInstrumentsIncorporated UCC28950 www.ti.com SLUSA16A–MARCH2010–REVISEDJULY2010 TYPICALCHARACTERISTICS(continued) NOMINALSWITCHINGFREQUENCY vs TEMPERATURE 95.4FSW(nom)-NominalSwitchingFrequency-HzFSW(max)-MaximumSwitchingFrequency-HzMAXIMUMSWITCHINGFREQUENCY vs TEMPERATURE 1079 95.0 1059 94.6 1039 94.0 1019 93.6 -40 25 TJ-Temperature-°C 125 999 -40 25 TJ-Temperature-°C 125 Figure30.Figure31. ERRORAMPLIFIEROFFSETVOLTAGE vs TEMPERATURE 0.00-0.05ErrorAmplifierOFFSETvoltage-mV125120AVOL-VoltageErrorAmplifier-dBVOLTAGEERRORAMPLIFIER (OpenLoopGain) vs TEMPERATURE -0.10-0.15-0.20-0.25-0.30-0.35-0.40-0.45-0.50 -40 25 TJ-Temperature-°C 125 VIO=3.6VVIO=2.5VVIO=500mV115110105100959085 -40 25 TJ-Temperature-°C 125 Figure32.Figure33. Copyright©2010,TexasInstrumentsIncorporatedSubmitDocumentationFeedback ProductFolderLink(s):UCC28950 31 UCC28950 SLUSA16A–MARCH2010–REVISEDJULY2010 www.ti.com TYPICALCHARACTERISTICS(continued) ISSCHARGECURRENT vs TEMPERATURE 26.0 SHUTDOWN/RESTART/RESETTHRESHOLD vs TEMPERATURE 0.60VSS(std)-Shutdown/Restart/ResetThreshold-V25.5ISS-ChargeCurrent-mA0.55 25.0 0.50 0.45 24.5 0.40 24.0 0.35 23.5 -40 25 TJ-Temperature-°C 125 0.30 -40 25 TJ-Temperature-°C 125 Figure34.Figure35. SSPULL-UPTHRESHOLD vs TEMPERATURE 3.71 4.694.69 VSS(pu)-SSPullupThreshold-VVSS(CL)-SSClampVoltage-VSSCLAMPVOLTAGE vs TEMPERATURE 3.71 4.684.684.684.684.684.674.67 3.70 3.70 3.69 -40 25 TJ-Temperature-°C 125 4.67 -40 25 TJ-Temperature-°C 125 Figure36.Figure37. 32SubmitDocumentationFeedback ProductFolderLink(s):UCC28950 Copyright©2010,TexasInstrumentsIncorporated UCC28950 www.ti.com SLUSA16A–MARCH2010–REVISEDJULY2010 TYPICALCHARACTERISTICS(continued) CURRENTSENSECYCLE-BY-CYCLELIMIT vs TEMPERATURE 1.996VCS(lim)-CurrentSenseCycle-By-CycleLimit-VCURRENTSENSEPROPAGATIONDELAY vs TEMPERATURE 110TCS(prop)-CurrentSensePropagationDelay-ns1.994 107 1.992 104 1.990 1.988 101 1.98698 1.984 -40 25 TJ-Temperature-°C 125 95 -40 25 TJ-Temperature-°C 125 Figure38.Figure39. OUTPUTSSINKRESISTANCE vs TEMPERATUREOUTPUTSSINKRESISTANCE vs TEMPERATURE 17.5RSINK-OutputsSinkResistance-WRSINK-OutputsSinkResistance-W17.5 RSINK_OUTF15.5 RSINK_OUTDRSINK_OUTA13.5 RSINK_OUTE15.5 RSINK_OUTCRSINK_OUTB13.5 11.511.5 9.5 9.5 7.5 -40 25 TJ-Temperature-°C 125 7.5 -40 25 TJ-Temperature-°C 125 Figure40.Figure41. Copyright©2010,TexasInstrumentsIncorporatedSubmitDocumentationFeedback ProductFolderLink(s):UCC28950 33 UCC28950 SLUSA16A–MARCH2010–REVISEDJULY2010 www.ti.com TYPICALCHARACTERISTICS(continued) OUTPUTSSOURCERESISTANCE vs TEMPERATURE OUTPUTSSOURCERESISTANCE vs TEMPERATURE 25 RSRC-OutputsSourceResistance-WRSRC-OutputsSourceResistance-W25 RSRC_OUTFRSRC_OUTE23 RSRC_OUTDRSRC_OUTB21 23 RSRC_OUTCRSRC_OUTA21 1919 1717 15 -40 25 TJ-Temperature-°C 125 15 -40 25 TJ-Temperature-°C 125 Figure42.Figure43. DEAD TIME DELAY vs TEMPERATURE 50 DEADTIMEDELAY vs TEMPERATURE 280 TCDSET2TCDSET1TOFFTIME-DeadTimeDelay-ns45 TABSET1270TOFFTIME-DeadTimeDelay-nsTABSET2260 40250 240 TAFSET2TBESET235 TAFSET1TBESET130 -40 25 TJ- Temperature - °C 125 230220 -40 25 TJ-Temperature-°C 125 Figure44.Figure45. 34SubmitDocumentationFeedback ProductFolderLink(s):UCC28950 Copyright©2010,TexasInstrumentsIncorporated UCC28950 www.ti.com SLUSA16A–MARCH2010–REVISEDJULY2010 TYPICALCHARACTERISTICS(continued) DCMTHRESHOLD vs TEMPERATURE 0.405 0.400DCM-DCMThreshold-V0.3950.390 0.3850.380 0.3800.375 -40 25 TJ-Temperature-°CFigure46. 125 Copyright©2010,TexasInstrumentsIncorporatedSubmitDocumentationFeedback ProductFolderLink(s):UCC28950 35 UCC28950 SLUSA16A–MARCH2010–REVISEDJULY2010 www.ti.com APPLICATIONINFORMATION UCC28950ApplicationDescription Theefficiencyimprovementofphase-shiftedfull-bridgeDC/DCconverterwithUCC28950isachievedbyusingthesynchronousrectificationtechnique,controlalgorithmprovidingZVSconditionovertheentireloadcurrentrange,accurateadaptivetimingofthecontrolsignalsbetweenprimaryandsecondaryFETsandspecialoperatingmodesatlightloadforthehighestefficiencyandpowersaving.ThesimplifiedelectricaldiagramofthisconverterisshowninFigure47.Thecontrollerdeviceislocatedonthesecondarysideofconverter,althoughitcouldbelocatedonprimarysideaswell.ThelocationonsecondarysideallowseasypowersystemlevelcommunicationandbetterhandlingofsometransientconditionsthatrequirefastdirectcontrolofthesynchronousrectifierMOSFETs.ThepowerstageincludesprimarysideMOSFETs,QA,QB,QC,QDandsecondarysidesynchronousrectifierMOSFETs,QEandQF.Forexample,forthe12-Voutputconvertersinserverpowersuppliesuseofthecenter-tappedrectifierschemewithL-Coutputfilterisapopularchoice.Tomaintainhighefficiencyatdifferentoutputpowerconditions,theconverteroperatesinnominalsynchronousrectificationmodeatmidandhighoutputpowerlevels,withtransitioningtothedioderectifiermodeatlightloadandfurtherfollowedbytheburstmode,astheoutputpowerbecomesevenlower.Allthesetransitionsarebasedonthecurrentsensingontheprimarysideusingthecurrentsensetransformerinthisspecificcase. TSW(nom)TABSET2OUTATABSET1OUTBTCDSET2TSW(osc)OUTCTCDSET1OUTDTBESET1OUTETAFSET1TBESET2OUTFTAFSET2IPR VDSQETON=0.5xDxTSW(nom)VDSQFVOUTx(1-D)/DVLOUTVOUTILOUT IOUTFigure47.MajorWaveformsofPhase-ShiftedConverter 36SubmitDocumentationFeedback ProductFolderLink(s):UCC28950 Copyright©2010,TexasInstrumentsIncorporated UCC28950 www.ti.com SLUSA16A–MARCH2010–REVISEDJULY2010 Majorwaveformsofthephase-shiftedconverterduringnominaloperationmodeareshowninFigure47.UppersixwaveformsintheFigure47showtheoutputdrivesignalsofthecontroller.Atnominalmode,theoutputsOUTEandOUTFoverlapduringthepartoftheswitchingcyclewhenthebothrectifierMOSFETsareconductingandthewindingsofpowertransformerareshorted.Current,IPR,isthecurrentflowingthroughtheprimarywindingofpowertransformer.Thebottomfourwaveformsshowthedrain-sourcevoltagesofrectifierMOSFETs,VDS_QEandVDS_QF,thevoltageattheoutputinductor,VLOUT,andthecurrentthroughtheoutputinductor,ILOUT.PropertimingbetweentheprimaryswitchesandsynchronousrectifierMOSFETsiscriticaltoachievehighestefficiencyandreliableoperationinthismode.ThecontrollerdeviceadjuststheturnOFFtimingofrectifierMOSFETsasfunctionofloadcurrenttoensuretheminimumconductiontimeandreverserecoverylossesoftheirinternalbodydiodes. ZVSisanimportantfeatureofrelativelyhighinputvoltageconverterstoreduceswitchinglossesassociatedwiththeinternalparasiticcapacitancesofpowerswitchesandtransformers.ThecontrollerensuresZVSconditionsovertheentireloadcurrentrangebyadjustingthedelaytimebetweentheprimaryMOSFETsswitchinginthesameleginaccordancetotheloadvariation.ControlleralsolimitstheminimumON-timepulseappliedtothepowertransformeratlightload,allowingthestorageofsufficientenergyintheinductivecomponentsofpowerstagefortheZVStransition. Assoonastheloadcurrentkeepsreducingfromthemidloadcurrentdowntono-loadcondition,thecontrollerselectsthemostefficientpowersavingmodebymovingtheconverterfromthenominaloperationmodetothediscontinuous-currentdiode-rectificationmodeand,eventually,atverylight-loadandatno-loadcondition,totheburstmode.Thesemodesandrelatedoutputsignals,OUTE,OUTF,drivingtherectifierMOSFETs,areshowninFigure48. OUTE(CCMMode)OUTF(CCMMode) OUTE OUTEandOUTFaredisabledifVCS Figure48.MajorWaveformsDuringTransitionsBetweenDifferentOperatingModes Copyright©2010,TexasInstrumentsIncorporatedSubmitDocumentationFeedback ProductFolderLink(s):UCC28950 37 UCC28950 SLUSA16A–MARCH2010–REVISEDJULY2010 ÓÉ Foxit Reader ±à¼-°æȨËùÓÐ (C) Foxit Software Company,2005-2006½öÓÃÓÚÆÀ¹À¡£ www.ti.com ItisnecessarytopreventthereversecurrentflowthroughthesynchronousrectifierMOSFETsandoutputinductoratthelightload,duringparalleloperationandatsometransientconditions.Suchreversecurrentresultsincirculatingofsomeextraenergybetweentheinputvoltagesourceandtheloadand,therefore,causesincreasedlossesandreducesefficiency.AnothernegativeeffectofsuchreversecurrentisthelossofZVScondition.Thesuggestedcontrolalgorithmpreventsreversecurrentflow,stillmaintainingmostofthebenefitsofsynchronousrectificationbyswitchingoffthedrivesignalsofrectifierMOSFETsinapredeterminedway.Atsomepre-determinedloadcurrentthreshold,thecontrollerdisablesoutputsOUTEandOUTFbybringingthemdowntozero. SynchronousrectificationusingMOSFETsrequiressomeelectricalenergytodrivetheMOSFETs.Thereisaconditionbelowsomelight-loadthresholdwhentheMOSFETdriverelatedlossesexceedthesavingprovidedbythesynchronousrectification.Atsuchlightload,itisbesttodisablethedrivecircuitandusetheinternalbodydiodesofrectifierMOSFETs,orexternaldiodesinparallelwiththeMOSFETs,formoreefficientrectification.Inmostpracticalcases,thedrivecircuitneedstobedisabledclosetoDCMmode.Thismodeofoperationiscalleddiscontinuous-currentdiode-rectificationmode. Atverylight-loadandno-loadcondition,thedutycycle,demandedbytheclosed-feedback-loopcontrolcircuitforoutputvoltageregulation,canbeverylow.ThiscouldleadtothelossofZVSconditionandincreasedswitchinglosses.ToavoidthelossofZVS,thecontrolcircuitlimitstheminimumON-timepulseappliedtothepowertransformerusingresistorfromTMINpintoGND.Therefore,theonlywaytomaintainregulationatverylightloadandatno-loadconditionistoskipsomepulses.Thecontrollerskipspulsesinacontrollablemannertoavoidsaturationofthepowertransformer.Suchoperationiscalledburstmode.InBurstModetherearealwaysanevennumberofpulsesappliedtothepowertransformerbeforetheskippingofftime.Thus,thefluxinthecoreofthepowertransformeralwaysstartsfromthesamepointduringthestartofeveryburstofpulses. VoltageLoopCompensationRecommendation ForbestresultsinthevoltageloopitisrecommendedtouseType2orType3compensationnetwork(Figure49).Atype2compensationnetworkdoesnotrequirepassivecomponentsCZ2andRZ2.Type1compensationisnotversatileenoughforaphaseshiftedfullbridge.WhenevaluatingtheCOMPforbestresultsitisrecommendedtoputa1-kΩresistorbetweenthescopeprobeandtheCOMPpinoftheUCC28950. VOUTVREFEA++CZ2RDRZ2RIEA-1 kWRCZ1RZ1CP1RWhen evaluating COMP, for bestresults put a 1-kWresistor betweenCOMPand probe.Figure49.Type3CompensationEvaluation 38SubmitDocumentationFeedback ProductFolderLink(s):UCC28950 Copyright©2010,TexasInstrumentsIncorporated UCC28950 www.ti.com SLUSA16A–MARCH2010–REVISEDJULY2010 ExperimentalResultsExample Thefollowingexperimentalresultsarebasedon660-Woutputpowerprototypeofphaseshiftedfull-bridgeDC/DCconverter.Theinputvoltageis300Vto400Vandtheoutputis12V,55A.TheprimaryMOSFETsareSPA11N60CFDandthesynchronousrectifierMOSFETsareFDP047AN08A0,twoinparallel.ThemeasuredefficiencyoftheprototypeisshowninFigure50. EFFICIENCY vs LOADCURRENT 100989694 Efficiency-%VIN=300VwithLRES92908886848280 0 5 10 15 20 25 30 35 40 45 50 55 LoadCurrent-A VIN=400VwithLRESVIN=350VwithLRESFigure50.EfficiencyofthePrototypePhase-ShiftedConverter (VIN=300V,350Vand400V,VOUT=12V) Becauseofthepowersavingneedevenatverylightandno-loadconditions,carefuloptimizationofoperationatlightloadconditionisrequiredtosettheproperboundariesbetweendifferentoperationmodes.TheresultofthisoptimizationisshowninFigure51.Thisplotdemonstratesthepowersavingswhilemovingfromthesynchronousrectificationmodeabove1-Aloadcurrent,intothediscontinuouscurrentmodewiththedioderectificationbetween0.3-Aand1-Aloadcurrent,andeventuallyintotheburstmodeoperationatloadcurrentbelow0.3A. LIGHT-LOADPOWERLOSSES vs LOADCURRENT 121110Light-LoadPowerLosses-W9876543210 0 0.2 DCMModewithDiodeRectificationCCMModewithSynchronousFETsBurstMode0.40.60.81.01.21.41.61.82.0 LoadCurrent-A Figure51.PowerLossesofthePrototypeatLight-LoadandNo-LoadConditions Copyright©2010,TexasInstrumentsIncorporatedSubmitDocumentationFeedback ProductFolderLink(s):UCC28950 39 UCC28950 SLUSA16A–MARCH2010–REVISEDJULY2010 www.ti.com REVISIONHISTORY ChangesfromOriginal(March2010)toRevisionA••••••••• Page ChangedUCC28950TypicalApplicationDiagram...............................................................................................................1ChangedConverterswitchingfrequencyfrom1400kHzto1000kHz.................................................................................3ChangedFunctionalBlockDiagram.....................................................................................................................................8ChangedTypicalApplicationDiagram..................................................................................................................................8AddedFigure5...................................................................................................................................................................15ChangedEquation..............................................................................................................................................................16AddedTypicalApplicationDiagram....................................................................................................................................16AddedalwaysdeliverevennumberofPowercyclestoPowertransformer......................................................................18Deleteddelivereitheroneortwopowerdeliverycyclepulses.IfcontrollerdeliversapowerdeliverycycleforOUTBandOUTC,thenitstops.IfitstartsdeliveringtoOUTAandOUTD,thenitcontinueswithanotherpowerdelivery cycletoOUTBandOUTC,andthenitstops......................................................................................................................18 40SubmitDocumentationFeedback ProductFolderLink(s):UCC28950 Copyright©2010,TexasInstrumentsIncorporated PACKAGE OPTION ADDENDUM www.ti.com 20-Jan-2011 PACKAGING INFORMATION Orderable DeviceUCC28950PWUCC28950PWR (1) Status (1) Package TypePackage Drawing TSSOPTSSOP PWPW Pins2424 Package Qty 602000 Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3) Samples(Requires Login)Contact TI Distributoror Sales OfficeRequest Free Samples ACTIVEACTIVE Green (RoHS& no Sb/Br)Green (RoHS& no Sb/Br) CU NIPDAULevel-1-260C-UNLIMCU NIPDAULevel-1-260C-UNLIM The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availabilityinformation and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms \"Lead-Free\" or \"Pb-Free\" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement thatlead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used betweenthe die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines \"Green\" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weightin homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on informationprovided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken andcontinues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 PACKAGEMATERIALSINFORMATION www.ti.com 20-Jul-2010 TAPEANDREELINFORMATION *Alldimensionsarenominal Device PackagePackagePinsTypeDrawingTSSOP PW 24 SPQ ReelReelA0DiameterWidth(mm)(mm)W1(mm)330.0 16.4 6.95 B0(mm)8.3 K0(mm)1.6 P1(mm)8.0 WPin1(mm)Quadrant16.0 Q1 UCC28950PWR2000 PackMaterials-Page1 PACKAGEMATERIALSINFORMATION www.ti.com 20-Jul-2010 *Alldimensionsarenominal DeviceUCC28950PWR PackageType TSSOP PackageDrawing PW Pins24 SPQ2000 Length(mm) 346.0 Width(mm)346.0 Height(mm) 33.0 PackMaterials-Page2 IMPORTANTNOTICE TexasInstrumentsIncorporatedanditssubsidiaries(TI)reservetherighttomakecorrections,modifications,enhancements,improvements,andotherchangestoitsproductsandservicesatanytimeandtodiscontinueanyproductorservicewithoutnotice.Customersshouldobtainthelatestrelevantinformationbeforeplacingordersandshouldverifythatsuchinformationiscurrentandcomplete.AllproductsaresoldsubjecttoTI’stermsandconditionsofsalesuppliedatthetimeoforderacknowledgment. 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FollowingareURLswhereyoucanobtaininformationonotherTexasInstrumentsproductsandapplicationsolutions:ProductsAudioAmplifiersDataConvertersDLP®ProductsDSP ClocksandTimersInterfaceLogicPowerMgmtMicrocontrollersRFID RF/IFandZigBee®Solutions www.ti.com/audioamplifier.ti.comdataconverter.ti.comwww.dlp.comdsp.ti.comwww.ti.com/clocksinterface.ti.comlogic.ti.compower.ti.commicrocontroller.ti.comwww.ti-rfid.comwww.ti.com/lprf TIE2ECommunityHomePage e2e.ti.com Applications CommunicationsandTelecomwww.ti.com/communicationsComputersandPeripheralsConsumerElectronicsEnergyandLightingIndustrialMedicalSecurity Space,AvionicsandDefenseTransportationandAutomotiveVideoandImagingWireless www.ti.com/computerswww.ti.com/consumer-appswww.ti.com/energywww.ti.com/industrialwww.ti.com/medicalwww.ti.com/security www.ti.com/space-avionics-defensewww.ti.com/automotivewww.ti.com/videowww.ti.com/wireless-apps MailingAddress:TexasInstruments,PostOfficeBox655303,Dallas,Texas75265 Copyright©2011,TexasInstrumentsIncorporated
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